SU416834A1 - - Google Patents

Description

. one

The invention relates to a pulse technique and can be used in computing devices and devices of discrete automation.

Known trigger devices contain a trigger on two inverters connected by inputs to the collectors of the launch transistors, the bases of which are connected via capacitors to the collectors of inverting transistors of the input elements “AND-NOT opposite arms of the trigger,” and two additional diodes, the emitters of the inverting transistors are combined and connected to a common through a chain of two series-connected diodes.

However, the known devices have insufficient speed.

The aim of the invention is to increase speed.

For this, the connection point of the emitters of the inverting transistors is connected via additional diodes to the connection points of the capacitors and the bases of the launch transistors, in which the emitters are combined and connected to the connection point of the diodes of the chain.

The drawing shows a circuit diagram of the device.

The trigger device contains a trigger on two inverters 1 and 2, which are complex inverters, starting transistors 3 and

4, inverting transistors 5, 6 input elements "AND-NOT 7 and 8, a chain of two series-connected diodes 9 and 10, additional diodes 11 and 12, capacitors

13 and 14.

The trigger device operates as follows.

In the initial state, the transistors 15 and 16 of inverter 1 are closed, and a high voltage level is applied to the counting input. In this case, the transistors 17 and 18 of the inverter 2 and the inverting transistor 5 are in the open state, and the inverting transistor 6 is closed, as its base current is shunted by the open transistor 18. The capacitor 14 is charged and the capacitor 13 is discharged. Zanus 3 and 4 transistors are closed, since their bases are under a small positive potential of 0.2-0.3 V with respect to

their emitters.

When applied to the low voltage counting input, the inverting transistor 5 closes. Through the resistor 19 and the base-emitter junction of the starting transistor 4, the capacitor 13 is charged. The charging current of the capacitor 13 opens the starting transistor 4, which bypasses the base current of the transistor 17, causing the transistors 17, 18 to close, which unlocks the transistors 15 and 16. After the charge of the capacitor 13 has ended, the startup transistor 4 is closed again.

Thus, the trigger device has switched to another stable state in which the transistors 15, 16 of inverter 1 are open and the transistors 17, 18 are closed.

When the input voltage changes from low to high, the inverting transistor 6 is unlocked and the capacitor 14 is discharged through the inverting transistor 6 and diode 12, and the trigger state does not change.

Subject invention

A trigger device containing a trigger on two inverters connected by inputs to

the starting transistor collectors, the bases of which are connected via capacitors to the collectors of inverting transistors of the input elements “AND –NOT opposite trigger arms,” and two additional diodes, the emitters of inverting transistors being integrated and connected to the common bus through a chain of two series-connected diodes, different in that In order to increase the speed of the device, in it the junction point of the emitters of inverting transistors is connected via additional diodes to the junction points of the condensation Hur and bases run transistors whose emitters are coupled and connected to the junction of diode chain.

 1 1 g

Account Login