SU370539A1 - DIGITAL LOW FREQUENCY FREQUENCY METER - Google Patents

Description

one

This invention relates to a radio measuring technique.

Known digital bottoms are: frequency countermeasures containing a clock frequency generator, the output of which is connected to the inputs of controllable gates, the control input of one of which is connected through the control unit to the output of the driver. A similar input to the other valve is connected to the output of the driver through a calibrated time interval sensor and a named control unit. In addition, the DEVICE contains a subtracting counter, the input of which is connected to the output of the first controlled valve, a summing counter, and two logic addition circuits.

The purpose of the invention is to increase accuracy, increase speed and simplify the device. This goal is achieved by the fact that the frequency meter is supplied with a system of pulse potential switches, a control trigger and a frequency divider, the input of which and one of the inputs of the control trigger are connected to the output of the second control valve. The output of the divider is connected to one of the inputs of the first logic addition circuit, the other input of which is connected to the output of the named trigger, and the output of the addition circuit is connected to the input of the summing counter. At the same time, the potential inputs of the system of imiulno-potential switches are connected to the outputs of the detracting counter, their pulse inputs are connected to the outputs of the summing counter, and the outputs are connected to the second input of the control trigger via the second logic addition circuit.

The drawing shows the block diagram of the proposed frequency.

It contains a clock frequency generator 1, controllable gates 2 and 5, a subtractive counter 4, a driver 5, a control unit 6 and a system 7 of impulse-potential keys. The device also contains a sensor 8 of calibrated time intervals, a control trigger 9 and a divider of 10 hours of frequency, and in addition the first logic addition circuit 11, the second logic addition circuit 12, and a summing counter 13.

Frequency meter works as follows.

In the initial state, the valves .2 and 5 are closed, and the counters 4 and / 5 are in the zero state. The measurement is carried out in two stages.

At the first stage, the period Tu of the measured frequency is quantized by generator pulses 1. At that, block 6 opens valve 2 for a time equal to Tx and pulses from the generator output enter the input of counter 4. During the period Tx, N t - Txfr is entered into counter 4 pulses (/ t - oscillator frequency 1)

and writes the number NOC t - (t

 L - conversion factors counters 4

and 13, where n is the number of bits of counters, L is the basis of the adopted number system). After the end of Tx, the valve 2 is closed, and the block 6 opens the valve 5 to pass the calibrated time intervals with the sensor 8.

At the second stage, the pulses with the following frequency / t / L are fed to the input of the counter 13 and the states of its triggers are measured. The intermediate outputs of the triggers of this counter are connected to the pulse inputs of the valves 7. The potential inputs of these gates are connected to the outputs of the trigger of the counter 4. If there is a resolving potential at the output of the corresponding trigger of the counter 4 during the transition of the trigger of the counter 13 from zero to one, at the output of the corresponding the valve is given a feedback pulse, which through the circuit 12 enters the input of the trigger 9 and overturns it into a single state. The next pulse of frequency / t, received at the other input of the trigger 9, translates it into the zero state. The pulse removed from the trigger is fed through the circuit 11 to the input of the counter 13. Thus, the input of the counter 13 receives a sequence of pulses with a frequency of output from the output of the divider 10, as well as a sequence of feedback pulses, the average frequency of which is determined by the containing number code in counter 4. The frequency at the input of counter 13 is determined by the ratio

f -A

/ in -,

A 1 - APOS

N, n-n,

- coefficient poloN, n

positive digital feedback.

Oh, at the input of the counter 13 frequency

f - m f Gv, - G ,.

N „

i.e.

times exceeds the measured frequency. After the end of the calibrated time interval, the counter 13 contains a number proportional to the measured frequency.

Subject invention

A digital low-frequency frequency meter containing a clock frequency generator, the output of which is connected to the inputs controlled

valves, the control input of one of which is connected through the control unit to the output of the former, and the same input of the other valve is connected to the output of the former through the sensor of calibrated intervals

time and the named control unit, subtracting the counter, the input of which is connected to the output of the First Controlled. Ventil, summing counter and two logic addition circuits, characterized in that, in order to improve the accuracy and speed of measurement, as well as simplify, it is equipped with a pulsed potential keys, a control trigger and a frequency divider, the input of which and one of the inputs of the control trigger are connected to the output of the second controlled valve, the output of the divider is connected to one of the inputs of the first logic circuit another input of which is connected to the output of the named trigger, and the output of the adding circuit

connected to the input of a summing counter, while the potential inputs of the pulse potential switch system are connected to the outputs of the detracting counter, (THEIR pulse inputs are connected to the outputs of the summing counter, and the outputs are connected to the second input of the control trigger via the second logic trigger input.