SU993143A1

SU993143A1 - Digital frequency meter

Info

Publication number: SU993143A1
Application number: SU813321983A
Authority: SU
Inventors: Геннадий Григорьевич Деркач
Original assignee: Предприятие П/Я А-1902
Priority date: 1981-07-23
Filing date: 1981-07-23
Publication date: 1983-01-30

Description

Изобретение относитс к измерительной технике и может быть применено в измерительных системах с частотными датчиками.The invention relates to a measuring technique and can be applied in measuring systems with frequency sensors.

Известен цифровой частотомер, содержадций генератор эталонной частоты , элементы И, счетчики импульсов, управл емый делитель Cl1.A digital frequency meter, a reference frequency generator, And elements, pulse counters, controlled by a divider Cl1, is known.

Недостатком частотомера вл етс ограниченный диапазон измерени .The disadvantage of the frequency meter is the limited measuring range.

Наиболее близким к предлагаемому вл етс цифровой частотомер, содержащий генератор эталонной частоты, генератор импульсов, четыре счетчика импульсов, два управл емых делител частоты, блок управлени , триггер, элементы И t2 3.Closest to the present invention is a digital frequency meter comprising a reference frequency generator, a pulse generator, four pulse counters, two controlled frequency dividers, a control unit, a trigger, and t2 3 elements.

Недостатком известного частотомера вл етс сравнительна сложность и недостаточна надежность работы.A disadvantage of the known frequency meter is comparative complexity and lack of reliability of operation.

Цель изобретени - повьвление надежности . The purpose of the invention is to increase reliability.

Поставленна цель достигаетс тем, что в цифровой частотомер, содержащий , последовательно соединенные генератор эталонной частоты, первый элемент И, первый счетчик, последова тельно соединенные генератор импуль ,сов, второй элемент И и управл еьшй делитель, кодовые входы которого .под лючены к разр дным выходам первого счетчика, второй и третий счетчики, третий элемент И и блок управлени , The goal is achieved by the fact that in a digital frequency meter, containing, in series, a reference frequency generator, the first element I, the first counter, successively connected a pulse generator, the second element AND, and a control divider, the code inputs of which are connected to the bit the outputs of the first counter, the second and third counters, the third element AND and the control unit,

5 первый рВыход которого подключен к BiTOpoMy входу первого элемента И и первому входу третьего элемента И, второй выход блока управлени соединен с вторым входом второго элемента5 whose first output is connected to the BiTOpoMy input of the first element And and the first input of the third element And, the second output of the control unit is connected to the second input of the second element.

to первый вход блока управлени подключен к входной шине устройства и к второму входу третьего элемента И, а второй вход подключен к промежуточному выходу первого счетчика, вход второго счетчика соединен с входом to the first input of the control unit is connected to the input bus of the device and to the second input of the third element I, and the second input is connected to the intermediate output of the first counter, the input of the second counter is connected to the input

15 управл емого делител , введен реверсивный счетчик, вход сложени которого подключен к выходу третьего элемента И, вход вычитани - к выходу15 controlled divider, reversible counter is inputted, the addition input of which is connected to the output of the third element AND, the subtraction input to the output

2Q второго счетчика, а выход реверсивного счетчика соединен с третьим входом блока управлени , выход управл емого делител подключен к входу третьего счетчика.2Q of the second counter, and the output of the reversible counter is connected to the third input of the control unit, the output of the controlled divider is connected to the input of the third counter.

На чертеже приведена блок-схемаThe drawing shows a block diagram

- частотомера.- frequency counter.

Цифровой частотомер содержит первый , второй и третий счетчики 1-3 и реверсивный счетчик 4, управл емый делитель 5 частоты, генератор б эта30The digital frequency meter contains the first, second and third counters 1-3 and the reversible counter 4, controlled frequency divider 5, generator b eta30

Claims

ground frequency and the generator 7 pulse / coHf first, second and third elements 8-10 And, block 11 of the control. In the initial state, the elements AND 8-10 are closed. At the beginning of the measurement, a single potential appears at the first output of the control unit 11 synchronously with the arrival of the first frequency pulse, and the first and third elements 8 and 10 I are opened. The first counter 1 begins to calculate the reference frequency pulses from the generator 6, and the reversible counter 4 (at the input of the input) —pulses and the measured frequency f, After the first counter 1 receives the number of pulses K (where K is a constant number l6 less than the capacity of the first meter, ka 1), at its output is the signal that arrives at the input unit 11 controls of the control unit at the time of the occurrence of a regular frequency pulse x closes the first and third elements AND 8 and 10 "At this point, the first counter of 1 pulses will go to Mts n frequency pulses fat g reversible counter 4 -, n frequency pulses x / where T is the period of the measured signal, fg oscillator frequency b, ti is a number from the row 1,2,3 ... Then the signal from the second output of the control unit 11 opens the second element AND 9. The pulses from the generator 7 begin to flow to the input controlled divider frequency 5 and the input of the second counter 2. Coefficient, d The controlled divider 5 is equal to the number N-1 recorded in the first counter 1. Pulses from the output of the controlled divider 5 frequencies: counted by the third counter 3. The counting occurs until the pulses coming from the output of the second counter 2 (with with a capacitance NO) to the subtracting input of the reversible counter 4, not; setting the reversible counter 4 to zero, At this point the control unit 11 closes the second element AND 9. This completes the conversion process. The number of pulses received in the third counter 3 is equal to. Since N0 and these are constant values, the number N is proportional to the measured frequency fx. Simplification of the device compared to the prototype is achieved by eliminating the second controlled divider and reducing the required capacity of the counter 2. In addition, the proposed device reduces the number of functional units There are 7 pulses with the high-frequency generator (only two functional units are controlled by the divider 5 and the counter 2, and in the prototype there are four). This increases the reliability of the device operation (to reduce the conversion time, the frequency of the pulse generator must be selected to its maximum and its upper value is limited by the speed of the functional nodes associated with the pulse generator i. Thus, the reliability of the device is achieved both as a result of device simplification and as a result of reducing the number of functional units operating at high switching speeds. Formula of the Invention A digital frequency meter containing series-connected the reference frequency generator, the first And element, the first counter, the pulse generator connected in series, the second And element and the controlled divider, whose code inputs are connected to the bit outputs of the first counter, the second and third counters, the third And element and the control unit, the first output of which is connected to the second input of the first element I and the first input of the third element I, the second output of the control unit is connected to the second input of the second element I, the first input of the control unit is connected to the input bus of the device and To the second input of the third element Ha I, and the second input is connected to the intermediate output of the first counter, the input of the second counter is connected to the input of the controlled divider, characterized in that, in order to increase reliability, a reversible counter is inserted into it, the input of which is connected to the output The third element I, the input of the subtraction to the output of the second counter, and the output of the reversible counter are connected to the third input of the control unit, the output of the controlled divider is connected to the input of the third counter. Sources of information taken into account in the examination 1. Electronics, 1976, No. 5, Fig. 2..

2. Authors certificate of the USSR 849092, cl. At 01 R 23/10, 1981 (prototype).

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