SU318017A1 - DIGITAL CONTROLLER - Google Patents

Description

The invention relates to automatic digital control devices, in particular, to static controllers used in automatic control systems of technological processes, for example, for continuous displacement.

Digital controllers are known that contain a software device and an adjustable parameter sensor through a mismatch element, an OR element and a time delay element connected to an integrator connected to a digital actuator and to a unit for selecting the direction of recording pulses to the integrator.

The proposed controller is characterized in that it comprises a second integrator connected to an actuator, a sign installation unit of the first integrator, two outputs of which are connected to an executive device, elements "AND-NOT," AND "OR, pulse generator connected to counter, each bit of which through the element "AND connected to the additional element" OR, associated with the second integrator, the Second 1 INPUTS of the elements "AND connected. To discharge the first integrator in such a way that the older discharge of the counter. the lowest bit of the integrator, and all bits of the integrator are connected to the input of the element “AND-NOT through two elements” AND connected to the installation circuit of the Mark of the first integrator. In this case, the second inputs of the last elements "And are connected with the outputs of the block for selecting the direction of recording the pulses iB of the first integrator.

This increases the dynamic accuracy of the re | the hum of the torus.

FIG. 1 shows the functional scheme | MA of the proposed regulator, where

but: 1 software device; 2 - sensor adjustable parameter; 3 is a two-input non-input element, designed to eliminate the phase coincidence of the program and sensor pulses; 4 - logical elg

ment "OR for combining the pulses of the program and the sensor; 5 - the first integrator forming the integral component of the regulatory action; 5 - the element of time delay; 7-block direction selection

Lazy recording of pulses in the first integrator 8 - pulse generator; P-counter; 10-logic elements “And two inputs; 11 logical element 12 is a logical element of "AND-NOT; 13 - logical, Schemes

“And two entrances; 14 - unit of installation of the sign of the first integrator (at the same time mouth, pouring the direction of the recording of the second integrator); 15 - the second integrator, which forms the component regulating,

tegralu; 16 - digital execution device; 17 - INPUT of the integral component of the regulatory action; 18 —the input of the component of the regulating action proportional to the double integral of the deviation (error); 19 - tires of the installation of the integral component of the regulating action.

FIG. Figure 2 shows diagrams explaining the pa6oty of the main node consisting of blocks.

At the output of this node (the output of the element //), a pulse sequence is obtained whose frequency is directly proportional to the value written by the first integrator 5, i.e. the value of the error integral. Making further integration of this signal by the second integrator 15, we obtain at its output a component of the regulating action directly proportional to the double integral of the error.

The device works as follows.

Two signals corresponding to one specified parameter value (program), the other measured parameter value (sensor), are fed to both inputs of the mismatch element 3, which eliminates the coincidence of the pulses in the same phase. The pulses that came simultaneously to both inputs are either mutually destroyed or automatically shifted. This is necessary to eliminate the failure of the first integrator. Further, both pulse sequences using the element "OR 4" are combined into a single sequence of pulses. Moreover, the sign of each pulse of this sequence is set with the aid of a block for selecting the direction of recording pulses into the first integrator 7. Pulses from element 4 through the element of time delay 6 arrive at the input of integrator 5 and are recorded in it. Thus, the preparation of the direction selection block precedes the account of the impulses arriving at the integrator input, which eliminates the failure of the integrator and increases the reliability of its operation.

In digital integrator 5, one pulse is summed and one pulse is subtracted, i.e. the selection of the mismatch integral (error), the value of which in the digital position code is fed to input 17 of actuator 16 for testing.

At the same time, the pulses from the generator 8 are fed to the input of the counter 9 and counted (see diagrams in Fig. 2).

The diagrams show the operation of a three-bit counter 9 and a three-bit output device of an integrator 5 operating in binary code.

fronts fronts, received through the element “AND 10 at the input of the element“ OR //. Elements "And 10" are controlled by potentials from the outputs of bits of the integrator 5, but in the reverse order. Thus, a smaller number in the integrator 5 (a smaller error) corresponds to a higher division ratio of counter 9 and a lower frequency at the element output // and vice versa to a larger number — greater

the frequency at the output of element 11. Moreover, as can be seen from charts 8-14, this dependence is directly proportional. The number of the pulse sequence from the input of element 11 is fed to the input of the intgrager 15, into which

they are summed up. The value of the sum obtained (the number in the integrator / 5) is directly proportional to the double. Integral of the deviation (error | bki). The oscillator frequency 8 can change the modulus of this number,

i.e., to establish a proportionality factor (/ Ci) of the constituent regulating effect proportional to the double integral of the deviation, the value of which in the digital position code is applied to

the input 18 of the actuator 16 for testing.

The outputs of all the divisions of the integrator 5 are connected to the element "AND-NO 12, the output from which controls two logic circuits" AND 13, through which the signals from block 7 arrive at block 14.

Element 12 is triggered only when the zero number is in the integrator 5. In this case (if all the zeros coincide at the inputs of the coincidence element 12), a “resolution to both circuits 13” signal is issued. first integrator

and the direction of the record in the second integrator using block 14. Since the potentials at the output of block 14 change only at the moment when the number in the integrator passes through zero, they characterize the sign of these

numbers The signal arriving via buses 19 to the actuator 16 sets the sign of the integral component of the control action (from the first integrator). Thus, the total control action coming on the digital actuator is equal to the sum of the two components

y y, - {. y k x ((} dt + k, l x (f) dtdt,

proportional to the integral and double integral of the deviation of the adjustable parameter. With closed loop feedback in steady state

, x (t) dfdt,

Subject invention

A digital controller containing a software device and an adjustable parameter sensor through a mismatch element, an OR element and a time delay element connected to an integrator connected to the digital actuator, and to an integrator direction selector unit, in which in order to increase the dynamic accuracy of the regulation, it contains a second integrator connected to the actuator, a block to set the sign of the first integrator, two outputs of which are connected to the performer th device, elements of the "NAND" and and

"OR, a pulse generator connected to the counter, each bit of which through the element" AND connected to the additional element "P1LI associated with the second integrator, 1 second inputs of the elements" And connected to the discharge of the first integrator in such a way that the most significant bit of the counter corresponds to the lowest bit of the integrator, and all bits of the integrator are connected to the input of the element “AND –NOT through two elements” AND connected to the unit for setting the sign of the first integrator, while the second inputs of the last elements “AND are connected to the outputs of a recording pulse selection direction for the first integrator.

regulation

Output of generator in

Entry from 9

The same after disdzherentsiroganil

The output of the element a 6 depending on the number 6