SU217750A1 - DIGITAL-ANALOG DEVICE - Google Patents

Description

Known digital-analog devices containing analog adders and threshold Schemes. The proposed device differs from the known ones in that it contains amplitude-sum mars, in which threshold transfer circuits are connected between discharge analog adders, and amplitude amplifiers, connected between amplitude-position adders and measuring instruments, as well as in that the Threshold circuit is connected with the maximum selection circuit of the high-order bits to the terms, and between each two adjacent bit-type analog adders are also included two .threshold circuits having common inputs from the bit. th adder younger of the two adjacent bits. This increases the accuracy and speed of the device, as well as expands the class of tasks. PA fIg. Figure 1 shows a block diagram of an ammo-position adder designed to add two positive three-digit numbers represented in an am-digit positional form. Correspondingly, the 1st, 2nd, and 3rd bits, 4, 5, 6 are the threshold elements, 7, 8, 9, 10 are the sum bits. Threshold elements 4, 5 v (6 are turned off. Between analog amplifiers mi 1, 2 W. 3. Pa 1 VHO.D./ / each threshold element iMeHTa is supplied with corresponding bits of the magnitude components, reference voltage, as well as output voltage of the previous threshold element. When the output voltage of the discharge amplifier of the - summer exceeds a certain voltage taken as a unit, the threshold element subtracts the unit from the output voltage of this discharge amplifier and simultaneously adds to the output voltage the next bit amplifier (high bit) voltage equal to 0.1. The most significant bit 10 sum is formed by the output of the threshold element of the previous bit. Similarly to be built adder with the number of bit d.v more than three (the number of amplifiers increases adders and threshold elements.) To add three or more numbers in amplitude-positional form, use a sequential combination of several amplitude-position adders.,

The adders described above are designed to sum only positive (or only negative) numbers.

To eliminate this disadvantage, a sham amplitude-positional adder is modified so that it can produce both addition and subtraction of two numbers, positive or negative (Fig. 2).

The legend for FIG. 2:

L - bit amplifiers-adders; 12- threshold elements providing lerenos for addition; / J-threshold elements that provide transfer to the subtraction; A 14-threshold element providing a change in the reference voltage of the threshold elements 13; 15, 16, 17 - logic circuits (selection of the maximum); 18 - inverter.

The lower order bits and sums are represented by voltages, the amplitude of which can vary continuously. In the remaining bits of the terms and sums, the voltage amplitude can take one of the allowable 3 terms.

The amplitude-positional adder consists of a series of bit amplifiers-adders 1J, between which two threshold elements are included, to the inputs of which junior from the adjacent bits of the components are supplied. The threshold element 12 carries the transfer to the addition, and the element 13 - to the subtraction. At the same time, for threshold elements that carry the transfer to addition, the reference voltage is constant and equal to minus 1, and for the threshold elements that carry out the transfer to subtraction, the reference voltage is the output voltage of the special threshold element M.

The input to the threshold element 14 is supplied from the output of logic circuit 15 (selection of the maximum), which has the outputs of the higher parts of the components. The output of the high-order threshold element 12 is connected via logic key circuit 17, controlled by the output of the threshold element 14.

The inputs of bit amplifiers-adders of bits n ... 2, 1, "bits d ... 2 - with a transfer coefficient of 0.9, and for the youngest bit 1 - with a factor of 1, and through a logical key circuit 16, controlled by the output of the inverter 18 of the signal of the threshold element 14, is connected to the input of the high-level amplifier summer - | -1. To transfer to the addition, the inputs of the threshold elements 12 of each bit are connected to the CO of the amplifier input of the bit of this bit with a transfer ratio of 1, and the outputs are connected to the inputs of the amplifier of the sum of the next higher threshold element

5 bits with a transfer ratio of 0.1.

For transfer to the subtraction, the inputs of the threshold elements 13 of each bit are connected to the input of an amplifier - accumulator of this bit (transfer coefficient 1), and the outputs of the threshold elements - to the inputs of the amplifier - summer and threshold element 13 of the next lower bit (transfer coefficient 0 ,one).

Subject invention

Claims (2)

1. A digital-analog device containing analog adders and threshold circuits, characterized in that, in order to improve the accuracy and speed of the device, it contains amplitude-position adders, in which threshold transfer circuits are connected between discharge analog adders, and amplitude reducing coders, included between amplitude, -position adders and measuring devices. 2. The device according to claim 1, characterized in that, in order to extend the class of tasks, the threshold scheme is connected to the scheme 0, the choice of the maximum of the highest bits of the items, and between each two adjacent discharge analog adders also included two threshold circuits that have common inputs ic with a discharge accumulator of the younger of two adjacent bits.