SU1764066A1 - Device for random process variance nonuniformity estimating - Google Patents

Abstract

The invention is intended to analyze the characteristics of non-stationary random fields and can be used to process signals in various radio systems. The aim of the invention is povS-1 7-7 23-1 8-1 3-J S-1 7-7 23-1 8-1 9-110-1-G K-1 - L g- - g Y speed response The structure contains two signals, a signal block 4, an M element (M is a quantity), each quad quad 6, an integration 8, a key 9, a blu element 11 The device contains 13, the shift register 14 (M + 2 ), amplitude delay 17, trigger by duration rator determination pulse generator - adjustable amplifier 3-i-t 10-1 -G K-1 - g The device speed, The device contains two adders 1 and 2, synchronizer 3, the selection unit minimum signal 4, M Elements 5-1 ... 5- M, M channels (M is the number of information sources), each of which includes a quadrant 6, an integrator 7, a logarithm block 8, a key 9, a subtraction block 10, a threshold element 11 and an element memory 12. The device also contains a shaper 13, a shift register 14, M + 2 keys 15-1 ... 15- (M + 2), an amplitude selector 16, a delay element 17, a trigger 18, a pulse selector for a duration of 19, a counter 20, the decoder for determining the time of analysis 21, the pulse generator 22, and in each channel an adjustable amplifier 23. 2 Il. 3-i -t (Л С И- (НЧ) -vj о ь О О О О

Description

The invention relates to devices for analyzing the characteristics of non-stationary random fields and can be used to process signals in various radio systems,

The aim of the invention is to improve the speed of the device.

Figure 1 shows the functional diagram of the device; 2 shows timing diagrams of signals at the outputs of the blocks of the device.

The device contains two adders 1 and 2, a synchronizer 3, a minimum signal selection unit 4, M elements 5-1 ... 5 -M, M channels (M is the number of information sources), each of which includes a quadrant 6, an integrator 7, a logarithm block 8, a key 9, a subtractor 10, a threshold element 11 and a memory element 12. The device also contains a generator 13, a shift register 14, M + 2 keys 15-1., 15- (M + 2 ), amplitude selector 16, delay element 17, trigger 18, pulse selector for duration 19, counter 20, decoder for determining the time of analysis 21, generation Op pulses 22 and each channel - an adjustable amplifier 23.

The device works as follows.

Via M information channels, selective values of M random Gaussian independent signals from M regions of the noise field with unknown powers are received at the inputs of quadrants 6-1 ... 6-M.

In any number of channels, additional random signals can interfere with the background. In order to determine the number of L signal samples last in each channel during the detection interval T0, it is squared in quadrants 6-1 ... 6-M, summarized in integrators 7-1 ... 7-M, where variance estimates are formed. These estimates are amplified in respective adjustable amplifiers with controllable gain 23-1 ... 23-M.

Next, the output signals of amplifiers 23-1 ... 23-M are fed to the inputs of like-named logarithm blocks 8-1., .8-M, where they are logarithmized.

The signals from the outputs of blocks 8-1 ... 8-M are obtained at the outputs of the corresponding keys 9-1 ... 9-M. The control inputs of the keys 9-1., 9-M are supplied with an enable signal from the output of synchronizer 3 at the time of the end of the integration interval in the integrators 7-1, .. 7-M.

Figure 2 shows timing diagrams at the outputs of the device, indicated by the corresponding block numbers along the axes. Enable signal with

The first output of the synchronizer 3 is shown in Fig. 2, al. Fig. 2b shows the reset pulses at the second output of the synchronizer 3, arriving at the reset inputs of all the integrators 7-1 ,, .7-M, the reset inputs of all the memory elements 12-1 ., 12-M and trigger reset input 18.

When the enabling signal is applied to the control inputs of keys 9-1 ... 9-M, the outputs from the blocks 8-1 ... 8-M logarithms are transmitted to their outputs. These voltages are fed to the corresponding inputs of the minimum determination unit 4 and simultaneously to the first inputs of the corresponding subtraction units 10-1 ,, 10-M. The smallest voltage selected in block 4 goes to all the second inputs of subtractors 10-1 ... 10-M.

The results of the subtraction from the outputs of blocks 10-1 ... 10-M are fed to the inputs of the corresponding threshold elements 11-1 ... 11-M, at the outputs of which the input voltage exceeds a predetermined threshold level corresponding to the required probability of a false alarm. The excess of the input voltage of a given threshold level is recorded in the corresponding memory elements 12-1 ... 12-M. At the outputs of the memory elements 12-1 ... 12-M, unit amplitude signals are formed when the voltage exceeds a predetermined threshold level. The number of these signals determines the number of additional random signals appearing in the M regions of the noise field. Let us consider in more detail the formation of an amplitude-interval complex signal, in which the detected dispersion heterogeneities are displayed.

In Fig. 2, three consecutive time ticks of time I, II, and III of the device operation are shown. In the diagrams of Fig. 2d, e, in step I it is shown that additional signals appeared in the second (12-2) and fourth (12-4 ) channels (non-adjacent). The signals from the outputs of the memory elements 12-1 ... 12-M are summed up in the first M-input adder 1. Therefore, in this case, in the first cycle, the voltage at the output of adder 1 is equal to twice the unit amplitude, since it displays the number of dispersions inhomogeneities in the channels. The double amplitude voltage is transmitted through the switch 15- (M + 1) only during the occurrence of a destructive pulse from the output of the former 13 (see Fig. 2c, g). The voltage from the output of the key 15- (M + 1) is fed to the corresponding input of the second adder 2 (see fig.2n).

The diagrams of FIG. 2, and it is shown that, at the outputs of the And 5-2 and 5-3 elements, the pulses do not appear, since in the I cycle, additional noise signals appeared not in the adjacent channels — the second and fourth.

At the same time, at the outputs of the keys 15-2 and 15-4, pulses appear with the corresponding time spacing (see Fig. 2k, m), which arrive at the corresponding inputs of the adder 2. As a result, at the output of the adder 2 in the I cycle the following amplitude-interval complex signal is formed (see fig.2n): the first pulse of double amplitude, indicating the presence of two dispersion irregularities in the channels of the device, the second and third pulses of unit amplitude separated by a time interval equal to the pulse duration, which indicates not dnorodnost h nonadjacent device channels. The specified complex signal is fed to the output of the device and simultaneously to the combined information input of the key 15- (M + 2) and the input of the amplitude selector 16.

Suppose that the amplitude selector is set to trigger when the pulse (first) exceeds or is equal to twice the unit amplitude.

In this case, the amplitude selector will work, giving a pulse that will trigger the trigger 18, with a delay T0 in the delay element 17, where m0 is the pulse duration at the output 13. The output signal of the trigger 18 will open the key 15- (M + 2), at the output of which the signal comes from the output of adder 2, but this signal will not have the first double amplitude pulse.

Thus, the signal from the output of the adder 2 is fed to the input of the pulse selector for a duration of 19. Suppose that the selector 19 operates in the case when the pulse duration t satisfies the condition

th t 2 th, (1)

where Go is the pulse duration at the output of the imaging unit 13 and the outputs of the shift register with M outputs 14.

As follows from the diagram of Fig. 2n, in the I cycle, the output pulse of the selector 19 does not form an output pulse, since the duration of each input pulse does not satisfy condition (1). This means that not a single pulse arrives at the input of counter 20, the counter continues to be in the zero state, until the second cycle.

At the output of the decoder for determining the analysis time 21, the signal is absent, the oscillation period of the pulse generator with a controlled period 22 saves

In the second cycle, the previous value T0, and the gain factors M of the adjustable amplifiers 23-1., 23-M also retain the same value K.

The diagrams of FIG. 2d, d in the I cycle show that additional signals are present in the second (12-2) and third (12-3) channels, which are adjacent. The signals from the outputs of the memory cells, summed in adder 1, also give a double unit amplitude pulse at its output, since the number of dispersions inhomogeneities in the channels is two. Hence, a double amplitude pulse is transmitted to the output.

key 15- (M + 1) during the occurrence of the permissive pulse from the output of the imaging unit 13 (see Fig. 2g).

Since in the second cycle additional signals (heterogeneities of dispersions) appeared in the neighboring (in the second and third) channels, this led to the appearance of a pulse at the output of the And 5-2 element. Indeed, at the first input of the AND 5-2 element, a pulse is output from the output of the memory element 12-2, to the second input of the AND 5-2 element a pulse is output from the output of the memory element 12-3, to the third input of the AND 5-2 element pulse from the third shift register output 14.

The coincidence in time of all three pulses leads to the appearance of a pulse at the output of the element And 5-2 in the second cycle (see Fig. 2h).

At the outputs of the keys 15-2 and 15-3, pulses appear (see Fig. 2k, l), which arrive at the corresponding inputs of the adder 2. Moreover, it should be noted that the pulses at the output of the AND 5-2 element coincide in time with the pulse at the exit of the key 15-3,

since they are formed by a pulse at the third output of register 14,

As a result, the output of the adder 2 in the second cycle forms a complex amplitude-interval signal (see FIG. 2n), consisting

from the first pulse of double amplitude (two inhomogeneities), pauses (since there is no heterogeneity in the first channel), a single amplitude pulse (heterogeneity in the second channel) and a double amplitude pulse, indicating the presence of a heterogeneity in the adjacent third channel,

The specified complex signal is fed to the output of the device and simultaneously to the information input of the key 15- (M + 2) and the input of the amplitude selector 16. Since the first pulse is 21) units Uac, the operation of the amplitude selector 16 triggers the trigger 18 with a delay T0 due to the presence of a delay element 17

The output signal of the trigger 18 opens the key 15- (M + 2), and at the key output there appears a complicated signal from the output of the adder 2, in which the first double amplitude pulse is absent (due to the delay in triggering the trigger 18 by the time t0. The second double pulse 2 t0 (see fig.2n) is fed to the input of the selector 19, which is triggered, since the duration of the second pulse satisfies condition (1). As a result, the counter 20 receives a pulse, which is recorded in it.

Suppose that the decoder 21 generates a pulse at its output in the case when an odd number — 1.3, etc., is written in counter 20, for example. In this case, the output of the device 21 is a signal (see FIG. 2p), which is fed to the control input of a pulse generator with a controlled period 22 and to the combined control inputs of M amplifiers with a controlled gain factor 23-1. ..23-M

As a result, there is a change in the oscillation period of the generator 22, a decrease to T0 (see FIGS. 2, 111 cycles). In addition, the gain of amplifiers 23-1 ... 23-M increases by a given amount, taking a value equal to K.

The device, which has become faster and more sensitive, begins to work in the third cycle. Suppose that in the third cycle there were additional signals in the second, third and fourth channels, which, as can be seen, are adjacent.

Consider in this case the formation of a complex amplitude-interval signal at the output of the adder 11, it can be said that it will have the form shown in fig.2n. This signal will contain the first pulse of triple amplitude (as three irregularities are detected), pause (since there is no heterogeneity in the first channel), a single pulse corresponding to the heterogeneity in the second channel, without a pause the double amplitude pulse corresponding to the heterogeneity in the third adjacent channel, without pause pulse of double amplitude, corresponding to the heterogeneity in the fourth adjacent channel.

In this case, the amplitude selector 16 also works. However, the selector 19 does not work, because the condition (1) is not fulfilled. As a result, counter 20 remains in the zero state. This, in turn, will lead to the fact that in the next step IV, the former oscillation period of the generator 22, equal to T0, and the former gain value K of the amplifiers 23-1 ... 23-M will be restored.

In other words, the device in the IV cycle returns to a less high-speed mode with a reduced sensitivity.

Further, the process can be repeated if again one or an odd number of adjacent inhomogeneities in the channels of the device are measured in TC.

Claims (1)

Invention Formula A device for estimating the heterogeneity of the dispersion of random processes, containing two adders, a synchronizer, a minimum signal extraction unit, M elements AND and M channels (M is the number of information sources), each of which contains a quad, an integrator, a logarithm unit, a key, a subtraction unit, a threshold an element and a memory element, in each channel the quad input is an information input of the device, the quad output is connected to the integrator information input, the output of the logarithm block is connected to information the key input, the output of which is connected to the input of the decremented subtraction unit, the output of which through the threshold element is connected to the information input of the memory element, the key output of the j-ro channel (j 1, M) is connected to the j-th input of the minimum signal allocation unit, the output of which is connected to the inputs of the readout blocks of the subtraction of all channels, the output of the memory element of the j-ro channel is connected to the jth input of the first adder, the first output of the synchronizer is connected to the control inputs of the keys of all channels, the second output of the synchronizer is connected to the inputs reset integrators and with the reset inputs of the memory elements of all channels, the output of the memory element of the first channel is connected to the first input of the first element I and to the second input of the Mth element I, the output of the memory element of the i-ro channel (I 2, M) is connected with the first input of the i-ro element And and with the second input of the i-1-th element And, the output of the j-ro element And is connected to the j-th input of the second adder, characterized in that, in order to improve speed, a pulse shaper is inserted into it , shift register, M + 2 keys, amplitude selector, delay element, trigger, pulse selector cos duration counter, decoder determining analysis time, the pulse generator and each channel - a controlled amplifier, wherein the output in each channel the integrator is connected to the information input of the adjustable amplifier, the output of which is connected to the input of the logarithm block, the output of the memory channel element is connected to the information input of the j-ro key, the output of which is connected to the (M + j) -M input of the second adder, the first output of the synchronizer is connected to input pulse generator, the output of which is connected to the reset input of the counter, to the information input of the shift register and to the control input of the (M + 1) -th key, the output of which is connected to the (2M + 1) -th input of the second adder, the output of which connect n with the information input (M + 2) of the key and with the input of the amplitude sector, the output of which through the delay element is connected to the setup input of the trigger, the output of which is connected to the control input of the (M + 2) -th switch, whose output through the selector key. A pulse torch is connected to the counting input of the counter, the bit output of which is connected to the input of the decoder for determining the analysis time, the output of which is connected to the input of controlling the period of the pulse generator and to the inputs of controlling the gain of adjustable amplifiers of all channels, the output of the generator of pulses is connected to the clock input of the synchronizer , the second output of which is connected to the trigger reset input, and the third output - to the clock input of the shift register, the first output of which is connected to the third input The Mth element AND, the i-th output of the shift register is connected to the third input (I) of the I element, the j-th output of the shift register is connected to the control input of the j-ro key, the output of the first adder is connected to the information input (M + 1) 2V Editor G. Belska Compiled by E.Hurtin Tehred M. Morgental ; 2 Proofreader M.Maksimishinets