SU1732486A2 - Device for transmission and reception of phase-manipulated signals - Google Patents

Abstract

The invention relates to telecommunications technology and can be used in data transmission systems. The purpose of the invention — improving noise immunity — is achieved by introducing an amplifier — a limiter, a frequency divider, a pulse shaper, a multivibrator, an element, a source of messages, an auxiliary input of the measuring unit and a phase jump correction on the transmitting side, and a recirculator accumulator — multivibrator, the first , the second and third elements And, the inverter, the amplifier-limiter, two additional inputs and one additional output of the measuring unit and the correction of the phase jump and the corresponding favoring bonds. The essence of the invention is to improve the noise immunity in the formation of the reference oscillation due to the elimination of errors due to an incorrectly specified initial phase of the reference oscillation. The invention is an improvement of the device according to ed. No. 1363519.3 Il., 2 tab. C /) C

Description

The invention relates to telecommunications engineering, can be used in data transmission systems, and is an improvement of the device according to the author. No. 1363519.

A device for receiving signals with phase shift keying is known, comprising an input filter, a switch, a manipulation filter, a reference oscillation extraction unit, a phase shifter, a character extraction block, a trigger, an AND element, a multivibrator, an inverter, and two switches.

However, it has insufficient noise immunity due to jumps in the phase of the reference oscillations at the transmitting and receiving parts of the device.

The closest in technical essence to the invention is a device for transmitting and receiving signals with phase

manipulation, containing on the transmitting side a reference signal generator, serially connected to the measuring unit and correcting the phase jump, phase manipulator and amplifier; on the receiving side — serially connected input filter, multiplier, manipulation filter, pulse shaper and amplifier, with the output the filter is connected through a series of a reference oscillator selection unit and a unit for measuring and correcting a phase jump connected to a second input of a multiplier.

A disadvantage of the known device is low noise immunity due to incorrect determination of the initial phase of the reference oscillation.

XI Cl)

GO

00 Oh

go

The purpose of the invention is to improve noise immunity due to the correct selection of the initial phase of the reference oscillation.

The goal is achieved by the fact that in a device for transmitting and receiving signals with phase shift keying, containing on the transmitting side a reference signal generator, connected in series with the measuring unit and correcting the phase jump, phase handler and amplifier, on the receiving side are serially connected input filter , a multiplier, a manipulation filter, a pulse shaper and an amplifier, the output of the input filter through a series-connected reference oscillation selection unit and a measuring unit; phase corrections are connected to the second multiplier input, additionally connected on the transmitting side are series-connected limiting amplifier, frequency divider, pulse generator, multivibrator and I element, as well as a message source, with the amplifier suppressor input connected to the output of the reference signal generator, the second the input of the element I is connected to the output of the pulse former, the output of the element I is connected to the additional input of the measuring unit and the correction of the phase jump, on the receiving side are entered after ovatively connected accumulator-recirculator, multivibrator, first element I and second element I, amplifier-limiter and inverter, with the output of the pulse former connected to the input of the accumulator-recirculator - torus, whose output is connected to the second input of the first element I, whose output connected to the first input of the third element I, the second input of which and the input of the inverter are connected to the output of the amplifier-limiter, the input of which is connected to the additional output of the measuring unit and correcting the phase jump, the first and the second The main inputs of which are connected respectively to the outputs of the third element And the second element And, the second input of which is connected to the output of the inverter.

Triggers perform the function of memory elements with the possibility of their installation in a single or zero initial state, performed on the basis of known circuits.

Multivibrators are designed to generate pulses that ensure that the block is formed and the binary code is stored in the desired state.

Limiter amplifiers are designed to generate signals of a given amplitude and shape.

A pulse shaper is designed to generate pulses that provide stable operation of circuit elements.

The frequency divider is designed to form gating pulses of a certain frequency.

The drive-recirculator is designed to form a voltage controlling the block forming and storing the binary code after receiving a certain number of pulses.

FIG. 1 is a functional diagram of the transmitting side of the device; FIG. 2 is a diagram of the receiving side of the device; in fig. 3, is a functional block diagram of the formation and storage of a binary code.

A device for transmitting and receiving signals with phase shift keying contains, on the transmitting side, a generator 1 of reference signals, a unit 2 for measuring and correcting a phase jump, a phase manipulator 3, an amplifier 4, an amplifier-limiter 5, a frequency divider 6, a driver 7 pulses, and element 8, multivibrator 9, source 10 messages, on the receiving side — input filter 23, reference oscillation extraction unit 24, multiplier 25, manipulation filter 26, pulse shaper 27, amplifier 28, phase jump measurement and correction unit 29, accumulator-re circulator 30, multivibrator 31, elements AND 32-35, inverter 34, amplifier-limiter 36.

 The reference signal generator 1 is serially connected to the first input of the measuring unit 2 and correcting the phase jump, the second input of the phase manipulator 3 and the amplifier 4, the output of the reference signal generator 1 is also connected in series with the limiting amplifier 5, frequency divider 6, pulse shaper 7, and a multivibrator 9, an AND 8 element and an additional input of the unit 2 for measuring and correcting a phase jump. The output of the pulse former 7 is connected to the second input of the And 8 element, on the receiving side the output of the input filter 23 is connected to a multiplier 25, a manipulation filter 26, a pulse former 27 and an amplifier 28, the output of the input filter 23 through a series connected reference oscillation selection unit 24, The first input of the unit 29 for measuring and correcting the phase jump is connected to the second input of the multiplier 25. The output of the pulse shaper 27 is also connected in series with the storage recycler 30, the multivibrator 31, the first moves the first AND gate 32 and second AND gate 33, whose output is connected to a first auxiliary input unit 29 measuring and adjusting the jump phase. The output of the drive-recirculator 30 is connected to the second input of the first element And 32, the output of which is connected to the first input of the third element And 35, whose second input and the input of the inverter 34 are connected to the output of the amplifier-limiter 36, the input of which is connected to the auxiliary output of the measuring unit 29 and adjusting the phase jump, the second additional input of which is connected to the output of the third element And 35. The second input of the second element And 33 is connected to the output of the inverter 34.

The unit 2 for measuring and correcting phase jumps contains two delay units 11 and 19, phase detectors 13 and 15, two phase shifters 12 and 14, a pulse shaper 16, an analyzer of 18 characters, an analog-code converter 17, a binary code formation and storage unit 20 decoder 21, controlled phase shifter 22.

The output of the generator 1 is connected to the inputs of the delay unit 11, the phase shifter 12 and the first input of the first phase detector 13. The outputs of the phase shifters 12 and 14 are connected respectively to the first and second inputs of the second phase detector 15. The output of the first delay block 11 is connected to the second input of the first phase detector 13 and the input of the second phase shifter 14. The outputs of the phase detectors are connected respectively to the inputs of the analyzer 18 characters. The output of the second phase detector 15 is directly connected to the first input of the converter 17 analog-code, and to the second input through the driver 16, the output of which is connected to the second input of the block 20 of generating and storing the binary code through the second delay unit 19, the outputs of the Converter 17 analog-code. The outputs of the analyzer 18 characters are connected to the fourth and fifth inputs of the binary code generation and storage unit 20, the fifth auxiliary input of which is connected to the output of the element 8. The outputs of the binary code generation and storage unit 20 are connected via the decoder 21 to the first inputs of the control unit. a phase shifter 22, the output of which is connected to the second input of the phase manipulator 3, the output of the first delay block 11 is connected to

the second input of the controlled phase shifter 22.

The phase jump measurement and correction block 29 contains two delay blocks 37 and 45, phase detectors 39 and 41, two phase shifters 38 and 40, pulse shaper 42, 44 characters analyzer, analog-code converter 43, binary code generation and storage unit 46, decoder 48, controlled phase shifter 47.

Connections within unit 29 for measuring and correcting phase jumps are similar to compounds within described unit 2 for measuring and correcting phase jump with some exceptions. The first input of the block is connected to the output of the reference oscillation allocation unit 24, the second auxiliary input is connected to the output of the second element 33A and connected to the fifth input of the block 46 forming and storing the binary code, and its sixth input is connected to the output of the third element 35 and the second additional input of the unit 29 for measuring and correcting the phase jump, the additional second output of which is the output of the phase shifter 38 and is connected to the input of the amplifier-limiter 36. The output of the controlled phase shifter 47 is connected to the second input multiplier 25.

FIG. 3 is a functional block diagram of the formation and storage of binary code 46. It contains the adder 49, the elements 50 And, the element 51 of the delay and m triggers 52.

The first K inputs of the adder 49 are connected to the outputs of the analog-digital converter 43, the second and third inputs of the adder 49 are connected to the outputs of the analyzer 44 characters, m outputs of the adder 49 through the elements 50 And the D inputs of the triggers 52 are connected to the inputs of the decoder 48, the output of the element 45 delay through the element 51 of the delay is connected to the second inputs of the elements And 50. The output of the second element And 33 is connected to the R-inputs of the flip-flops 52, and the output of the third element And 35 is connected to the S-inputs of the flip-flops 52.

The scheme of the block 20 of forming and storing the binary code on the transmitting side is similar to the scheme of the block 46 of forming and storing the binary code on the receiving side with the exception of: the S inputs of the flip-flops are interconnected with the housing, and the R inputs are connected with the output of the element 8 I.

A device for transmitting and receiving signals with phase shift keying operates as follows.

The oscillations from the generator 1 of the reference signals enter the unit 2 for measuring and correcting phase jumps, which compensates for the phase jumps of generator 1. Since the circuit does not provide for controlling the generator 1, the block 2 for measuring and correcting phase jumps measures the phase jump of the output voltage generator and with the required accuracy of correction, determined by the converter 18 analog-code, compensates for this jump by adjusting the controlled phase shifter 22. The binary correction code is stored unchanged until the next phase jump of the generator 1 in the block 20 of the formation and storage of binary code. Thus, the code for correcting each jump of the generator 1 phase of the reference signals consists of the binary value of the magnitude of the jump itself, plus the sum of the codes of all previous values:

P

  E I p 1, 2 ....

i 1

Such a correction scheme has several drawbacks. It does not take into account the initial state of the block 20 of the formation and storage of a binary code, which with the same probability can be in one of

OWN SUSTAINABLE STATES. Summing up

the subsequent codes of the phase jump correction, the source code leads to the fact that the output of block 2 (29) of the measurement and the phase jump correction will constantly present an error. Since all items

block 2 (29) of measurement and correction of phase jumps have a certain error, then the presence of a summing element, which is the block 20 (46) of the formation and storage of binary code, will lead to an accumulation of error, which at some time will exceed the permissible limits and at the output of block 2 (29) of measurement and correction of jumps

PS for Wits error.

All these drawbacks are devoid of the proposed device for transmitting and receiving signals about phase shift keying.

The signal from the output of the generator 1 of the reference signals enters the amplifier-limiter 5, which outputs signals of positive polarity, limited in amplitude. Further, in the divider 6, the formation of the clock frequency signals. Such a circuit allows the use of more stable generators as generator 1. The resulting pulses are received in the imaging unit 7 pulses, which generates pulses of the desired shape and amplitude.

5 10 15

0

five

Q

five

P

five

l

five

The sequence of rectangular clock pulses arrives simultaneously at the first input of the AND 8 element and at the input of the multivibrator 9 operating in the standby mode. These two elements play the role of a valve that transmits only the first impulse from a sequence of pulses. The waiting multivibrator 9 is assembled according to the push-pull scheme and serves as a delay line for one SR cycle. The output of the multivibrator is connected to the inverted input of the element 8. Thus, the first pulse, having passed through the element and having got to the inputs of the flip-flops, will set the binary code generation and storage unit 20 to the zero initial state. The same pulse delayed by one cycle in the multivibrator 9, applied to the inverse input of the element And 8, will prohibit the passage of the second pulse to the input of the block 20. The second pulse will prohibit the passage of the third, etc.

So with the help of blocks 5-9, the initial installation of block 20 for the formation and storage of binary code is performed.

The scheme of the receiver of the device (Fig. 2) works as follows.

Information from the communication channel is fed to the input filter 23, which limits the frequency band of the received signal. Next, the information signal is fed to the inputs of the reference oscillation allocation unit 24 and the multiplier 25.

The reference oscillation allocation unit 24 restores the reference oscillation according to the information phase-manipulated signal. The selected reference oscillation with a random initial phase enters unit 29 for measuring and correcting phase jumps. This unit works similarly to unit 2 in the transmitting part of the device, i.e. compensates for abrupt changes in the phase of the reference oscillation and sets the initial phase of the reference oscillation at the beginning of the reception and after interruptions in communication. From the output of block 29 formed reference oscillation type

Son (t) Von Sin (ubt + p0),

enters the second input of the multiplier 25.

Using the multiplier 25, the manipulation filter 26 and the pulse former 27, the input phase-manipulated information sequence of high frequency pulses is converted into positive pulses having two levels corresponding to, with a certain probability, the original combination formed by the source of information. This sequence is amplified in amplifier 28 and provided to the recipient of the messages.

In the course of transmission over the communication channel, the sequence of information phase-manipulated signals of the form S (t) V (t) x xcos (u0t +), O, n, formed by the receiving part, is exposed to noise and various types of interference. Limited by interrupting communication information signals, as they account for up to 30% of all errors made by interference and noise. And the noise will be considered white, Gaussian. As a result of interference, the input combination has the form

S (t) V (t) cos (G) 0t + V) + n (t),

where V (O (p ™ + Up - the current value of the phase;

 - the phase shift of the signal due to interference.

In this case, it is possible that the presence of the component Vi leads to a phase reversal by 1, i.e. there is an effect of reverse work.

The proposed scheme allows the initial phases to be set as follows.

The sequence of pulses from the output of the pulse former 27 is also fed to the input of the storage ring-recirculator 30, which serves as a pulse storage ring. It is necessary in order to eliminate the definition of a phase by a single pulse, which can be impulsively interfered. In the event that N in-phase pulses arrive at the input of the storage ring drive, it will give an additional gain in the signal-to-noise ratio by

B (1 + t) (1 - m) N / 2 / (1 - t),

where t is the transfer coefficient of the recirculator feedback circuit.

After receiving the Nth pulse, the output voltage will be sufficient to start the waiting multivibrator 31. The multivibrator is assembled in a multi-stage manner such that its time constant is equal to MTz, where Ti is the pulse period. The output of the multivibrator is connected to the inverse of the input of the first element AND 32. Therefore, with stable operation of the circuit, the output of the element 32 AND appears only the first pulse from the output of the accumulator 30, which goes to the first inputs of the second 33 and third 35 elements I. The second pulse from the output drive 30 not

will pass to the output element And 32, since the first pulse delayed in the multivibrator, will go to the second inverse input of this element. Suppose that N pulses of the form cos x (t), where x (t) is an information parameter, arrived at the input of the accumulator recirculator 30. The impulse from its output goes to the first input of the element And 32. The formed N-th pulse of the reference oscillation of the form

sin a (t) from the output of the reference oscillation allocation unit 24 through the phase shifter 38, which rotates the phase by the value of n 12, is fed to the input of the amplifier-limiter 36. In this element, the reference pulse

limited in amplitude, i.e. limiter 36 serves as a threshold device. The impulse formed in this way will go to the second inputs of the second 33 and third 35 elements I. And a pulse will go to the element 33 and through the inverter 34. Therefore, single impulses are fed to the inputs of the element 35. By its output voltage applied to the R inputs of the flip-flops, element 35 will set the block 46 to form and store the binary code to its original zero state. If the reference oscillation extraction unit 24 produces a pulse of the form cos a (t), which corresponds to the appearance of the inverse effect

operation, the pulse from the output of the phase shifter 38, formed in the amplifier-limiter 36, through the element 33, being fed to the S-inputs of the flip-flops 53, will set the block 46 to form and store the binary code in such a state that The operation of the controlled phase shifter 47 will compensate for the phase shift of the reference oscillation relative to the information signal by the values of / 2.

Thus, the inserted blocks allow to set the initial phase of the generated voltage on the transmitting side, to determine the initial phase on the receiving side

phase of the received information sequence of the phase-shift keyed signals and in accordance with the phase position set the initial phase of the reference oscillation.

As a criterion for evaluating the proposed device, we choose the error probability of one element. From the possible communication channels, choose a channel that is subject to

the effects of white, Gaussian noise, interruptions of communication, through which information is transmitted in the form of high-frequency phase-shift keying pulses. Therefore, in general, the expression to determine the probability of an error in a single element

has the appearance

ROSH R (. ROSHSCH ROSHP) 1 0)

where PouxpQ is the error probability due to incorrect determination of the initial phase;

ROSHS error probability due to noise;

ROSP is the probability of error due to interruptions in communication.

Without setting the task of investigating the dependencies of Roshdo R ° ShSh and r ° shp between themselves and in order to reduce the amount of calculations, we assume that the listed probabilities are not correlated. Then the expression (1) takes the form

ROSH - Rler Roshp + (1 Rper) X X (Roshsh + Roshdo),

(2)

where Per is the probability of a break in communication.

Since the prototype does not determine the position of the phase of the signal at the initial moment of time, as well as after interruptions in communication, and the transmission is carried out by phase-shifting signals, both phase values are equal, therefore, the probability of error for the water element due to incorrect determination of the position of the initial phase The received signal in the prototype is equal to (0.5.

In the proposed device, using the inputted additional blocks, the initial phase of the received signal is determined and the block 46 is created and the binary code is stored in the appropriate state. Thus, the probability of an error depends only on noise and the probability of an error of circuit elements, since the reliability of operation of modern discrete elements is much greater than the probability of an error in receiving a signal due to noise, then the probability of an error in receiving one element is due to an incorrect definition. the position of the initial phase of the received signal in the proposed device will be equal to

Pouifp 02 Rossh.

To calculate the error probability in a single element of a phase-shift keyed signal due to the presence of noise in the communication channel, we use the well-known formula:

Rosh 0.5 x | 1-0 () l, (3)

already

th flat

where h

halogen density

the ratio of the signal to the spectra (x)

x

 2

dx - integral

likelihoods.

We write the expression to determine the probability of an error in the known (P0shch) and in the proposed (Roche) devices:

Rosh1 0.5 X Oper + (1 Oper) X (Rosh 0,5);

(four)

Rosh2 0,5 X Rper + (1 - Rper) X 2 ROSH. (five)

In order to find the probability of the occurrence of communication interruptions, we will use the relative decrease time

The received signal level is 17.0 dB, which is entered as a parameter for estimating the state of the communication channel. This value should not exceed 0.8.

Substituting the various values of the signal energy to the interference spectral density, we determine the error probability values from (4) and (5) for the limiting quality of the communication channel Rper 0.8 x. The results of the definitions are listed in

tab. 1 and 2.

From tab. 1 that even under strong h2 1 interference conditions, the proposed scheme gives a gain of 3.6 times. For the average channel condition (h2 3), the gain is

35 times. For this value, we calculate the probability values of the errors P0m1 and P0n2 For different values of the probabilities of the occurrence of communication interruptions. As can be seen from the table. 2, payoff and for very bad communication channel

(Perper 0.1) in noise immunity for the proposed device is 8 times.

The positive effect from the use of the invention is that this device allows a 35-fold increase in noise immunity in the reception of a single element by determining and setting up the initial phase of the phase-shifting oscillation.

Claims (1)

Invention Formula A device for transmitting and receiving signals with phase shift keying according to the author. Mg 1363519, characterized in that, in order to improve the noise immunity, entered on the transmitting side are series-connected limiting amplifier, frequency divider, pulse shaper, multivibrator and element I, as well as a message source, the input of the amplifier limiting amplifier connected to the output of the reference signal generator, the second input of the I / I element connected to the output of the pulse shaper, the output of the element I is connected to the auxiliary input of the unit for measuring and correcting the phase jump, the serially connected storage-recirculator, multivibrator, the first el are introduced at the receiving side ment and the second AND gate and third AND gate, a limiting amplifier and an inverter, the output of the pulse shaper is connected to the input of accumulator -retsirkul torus yield 0 which is connected to the second input of the first element I, the output of which is connected to the first input of the third element I, the second input of which and the input of the inverter are connected to the output of the limiting amplifier whose input is connected to the additional output of the measuring unit and correcting the phase jump, the first and second additional inputs which is connected respectively to the outputs of the third element And the second element And, the second input of which is connected to the output of the inverter. Table 1 goa, 0.506 0.5068 0.50710.5071 ROM, 6, E 10-3.3 1.3-10-2 1.67 10 1.43 Yu-2 MH Yu 2 1.43 1.47 1.1 (23 Yu 2 Roy, oh GO 13 26.5 thirty 35 35 35 Ik 35 0.5071 0.5071 0.5071 0.5071 35 35 Ik 35 Fig N hs6-- B Th four FIG. 2