SU1669081A1 - Communication system with time-division multiplex - Google Patents

Abstract

The invention relates to telecommunications. The purpose of the invention is to reduce power consumption. The communication system comprises a main transceiver 2, a communication unit 6 and a peripheral transceiver 4. The communication unit 6 is an inductive parametric converter and includes transformer cores 19 and 20, transformer windings 21, 22 and 23, resistance 24 and bi-directional key 25. Magnetic cores 19 and 20 are connected to transceivers 2 and 4. Information is transmitted with closed magnetic cores 19 and 20. When the magnetic cores 19 and 20 are closed in transceiver 4, a signal for transmission of information is generated, tory transmitted to the transceiver 2 by varying the inductance in block 6 bond. After receiving the transmission readiness signal by the transceiver 2, the request signal is generated in it as a change in the time interval between the synchronization and command signals transmitted through the communication unit 6 to the transceiver 4. In response to the request signals, the transceiver 4 generates information signals that, depending on the value The transmitted information establishes the inductance of the parametric converter during the action of the command signal. 2 Il.

Description

L-JSJ

The invention relates to telecommunications and can be used to transmit information.

The purpose of the invention is to reduce power consumption. .

FIG. 1 shows a structural electrical circuit of the proposed communication system; in fig. 2 is a timing diagram of a time division signal communication system. The time division signaling communication system comprises a synchronization signal generator 1, a main transceiver 2, a recording unit 3, a peripheral transceiver 4, an information signal generator 5, a communication unit 6.

The central transceiver contains a pulse-width modulator 7, a key 8, the first and second threshold blocks 9 and 10, the first and second time discriminators 11 and 12. The peripheral transceiver contains an AND-NE element 13, the selector 14 of synchronizing pulses, the inhibitor 15 of the inhibition pulses, shaper 16 ready signal, the selector 17 command pulses and shaper 18 clock pulses.

The communication unit contains the first and second transducers 19 and 20 of the transformer, the first, second and third windings 21-23 of the transformer, the resistance 24 and the bidirectional switch 25.

The system works as follows.

In the initial state of the magnetic circuits

19 and 20 are disconnected and the communication system is in standby mode. In this case, from the output of the synchronization signal generator 1, pulses arrive (Fig. 2a) at the second input of the latitude of the no-pulse manipulator 7 and start it. As a result, rectangular pulses are formed at its output (Fig. 2c). which are fed to a differentiating chain consisting of capacitance resistance 24 and the first winding 21 of the transformer located on the first magnetic conductor 19. Since in the initial state the magnetic conductors 19 and

20 are disconnected, then the first winding 21 located on the open magnetic circuit 19 has a small inductance and narrow pulses are differentiated on it (Fig. 2d). These pulses arrive at the inputs of the first and second threshold blocks 9 and 10, and rectangular pulses are formed in their outputs (Fig. 2e, e) whose duration is proportional to the duration of the input pulses (Fig. 2d). Due to the fact that in the initial state, the inputs of the first time discriminator 11 are received

narrow pulses (Fig. 2d) at its output a logical O signal is generated (Fig. 26). Under the action of this signal, the key 8i is maintained in the closed state (Fig. 2h),

and at the output of the pulse-width manipulator 1 pulses of duration equal to Ti are formed (Fig. 2c). The output signal of the second time discriminator 12 (Fig. 12g), arriving at the first input

0 of the registration unit 3, it is not registered there, since at its second input there are no clock pulses that do not pass through the private key 8.

In the peripheral transceiver in

In the initial state, the following occurs. There are no signals on the second winding 22 of the thermal transformer (Fig. 2i) and, therefore, they are also absent at the output of the selectors 14, 17, synchronizing and commanding pulses, the driver 15 inhibit pulses and the generator 18 clock pulses (Fig. 2k, m, l, about). At the same time at the output of the shaper 16 readiness signal there is a logical signal

5 O (Fig. 2n), which establishes the signal of logical 1 at the first output of the generator 5 of the information signal and at the output of the NAND element 13 (Fig. 2c. C). Signal logic 1 (FIG. 2c), incoming

0 to the input of the bidirectional key 25, keeps it open, and thereby a third winding 23 of the transformer is shunted.

At time ti is carried out

5 docking of the magnetic cores 19 and 20, while they form a closed magnetic circuit, on which all three windings 21-23 are located. Although the magnetic circuit is closed, but the inductance value of the winding 21 practically does not change, since the magnetic conductor is not closed short bidirectional key 25 winding 23, therefore, the duration of the pulses (Fig. 2d) arriving at the threshold inputs

5, blocks 9 and 10, does not change, and consequently, the operation of the main transceiver 2 does not differ from its operation in the initial state. The work of the peripheral transceiver after docking magnetic circuits

0 19 and 20 next. After connecting the magnetowires 19 and 20, the signals formed on the first winding 21 are transmitted to the second winding 22 (Fig. 2i). These signals arrive at the inputs of the selectors 14 and 17 of the sync timing and command pulses. At the same time, negative pulses (Fig. 2m) are selected by the command pulse selector 17 and fed to the input of the clock generator 18, and positive pulses (Fig. 2k) are selected by the selector

14 synchronizing pulses and are fed to the input of the imaging unit 15 prohibition pulses, which produces rectangular pulses with a duration greater than the sum of the duration Ti and the duration of the output pulses of the selector 17 command pulses. The inhibit pulses (Fig. 2L) are fed to the input of the clock 18 clock pulses and to the input of the ready signal 16. Due to the fact that the initial pulses of the selector 17 command pulses arrive at the input of the clock generator 18 during its action on the second input of the inhibit pulses, the driver 18 clock signals do not produce signals.

After a certain number of inhibit pulses (which is selected based on the time of connecting the magnetic cores 19 and 20) to the Shaper 16 of the ready signal, the latter generates a ready signal to transmit information in the form of a logical 1 (Fig. 2c). This signal arrives at the second input of the information generator 5. signal, sets it in the mode of information transfer. At the second output of the information signal generator 5, a logical 1 signal is generated. In the absence of clock pulses, a logical 1 signal is also generated at the first input of the information signal generator 5 at its first output (Fig. 2n). Thus, at the time of formation of the readiness signal, a logical 1 signal is set at all inputs of the NAND 13 element, and a logical O signal is established at its output (Fig. 2, c), which opens the bidirectional switch 25. The open bidirectional switch 25 stops shunting the third winding 23 and thereby increasing the inductance of the differentiating circuit consisting of capacitance 24 and winding 21, which, in turn, leads to an increase in the duration of the differentiated signal (Fig. 2, d), ing supplied to inputs of the first and second threshold blocks 9 and 10. The increase in the pulse duration (Fig 2d). arriving at the input of the first time discriminator, causes its output signal to become logical 1 (Fig. 26). Under the action of this signal, the key 8 opens, and the duration of the output pulses of the pulse-width manipulator 7 increases and becomes equal to T2 (Fig. 2, c), which is commensurate with the duration of the inhibit pulses of the peripheral transceiver (phi 2n).

to the peripheral transceiver, the output pulse of the selector 17 command pulses is delayed with respect to the output pulses of the selector 4 of synchronizing pulses for oremch. equal to T s ((| ui 2k, m). This leads to the fact that on the nfptum input shapers 18 clock pulses, the incoming pulses (fig. 2m) after the end of the impulses are blocked (fig. 2l) start it

The input pulses (Fig. 2m), arriving at the first input of the imaging unit 18, also the pulse of the impulses, arrive after the action of the inhibiting pulses (Fig. 2n) in its second

5 entrance. Therefore, at the output of the imaging unit 18 of these pulses, pulses are produced (Fig. 26), arriving at the first input of the information signal generator 5. During the action of these pulses on

0, the first output 5 of the information signal is set to the value of the transmitted bit of information (Fig. 2n), at all other times at its output - the signal of logic 1. Thus, when transmitting information of logical O, the signal of logical O is set at the second input of the IS-13 element since the action of the clock pulse at the first input of the generator 5 of the information signal, therefore,

0 at the output of the NAND 13 element at this time a logical 1 signal is established and the bidirectional key 25 closes, shunting the third winding 23, a and l output of the second threshold unit 10 (FIG. 2e) and forms a narrow pulse that sets the output of the temporary discriminator 12 signal of logic O. When transmitting information of logical 1 on the acex inputs of the element NAND 13, the signals of logical 1,

0 at its output is a logical O signal, which keeps the bidirectional key 25 in an open state, which leads to the formation of a wide pulse at the output of the second threshold unit 10 (Fig. 2e) and

5 signal of logical 1 at the output of the second time discriminator 12 (Fig. 2g).

The information signal (Fig. 2g), coming from the output of the second temporary discriminator 12 to the second input of block 3

0 is recorded in it at the moment of a positive signal drop (Fig. 2h), coming through the key 8 on its first input.

At the end of the transmitted information, at the time tj (Fig. 2p), a second signal is set at the second output of the generator 5 of the information signal, under the action of which the signal of logical 1 is formed at the output of the NAND 13 element (Fig. 2c).

This signal closes the bidirectional switch 25, which shunts the third winding 2, which leads to a decrease in the inductance of the differentiating chain, consisting of capacitance 24 and the first winding 21, and consequently, to a decrease in the duration of the pulses formed on it. Narrow pulses from the output of the first threshold unit 9, which are fed to the input of the first time discriminator 11, set at its output a logical signal O, which closes key 8 and sets the duration of the output pulses of pulse width discriminator 1, equal to Ti (Fig. 2c ). As a result, the formation of clock pulses (Fig. 2o) is stopped by the clock pulse generator 18 and transmitted from the peripheral transceiver to the main one.

At time t4, corresponding to the separation of the magnetic cores 19 and

20block 6, signals of the first winding

21 cease to transform into the second winding 22, and consequently, prohibition impulses also cease to form (Fig. 2L). After a time determined by the selected delay (the amount of delay is determined on the basis of the disconnection time of the magnetic cores), a logical 1 signal is set at the input of the ready signal generator 16 (Fig. 2n), and the communication system returns to its initial state.

As can be seen from the above description of the communication system, the transmission of energy from the peripheral transceiver to the main one during the transmission of information does not occur. In this way, the power consumption of the system is saved.

Claims (1)

Invention Formula A time division signaling communication system comprising a synchronization signal generator, the output of which is connected to the synchronization input of the main transceiver, the first and second signal outputs of which are connected to the inputs of the recording unit, the information signal generator, the clock input of which is connected to the clock output of the peripheral transceiver, informational inputs of which are connected to informational outputs of the informational signal generator, characterized in that, in order to reduce power consumption ektroenergii, entered parametric converter, whose input is connected to Leray the third signal output of the main transceiver, the signal input of which is connected to the first output of the parametric converter, the second output of which is connected to the signal input of the peripheral transceiver, the signal output of which is connected to the second input of the parametric converter, while the output output of the peripheral transceiver is connected to the installation input of the information signal generator, The parametric converter contains a transformer with three windings and two disconnections. the main conductors, a resistance and a bidirectional key, the signal outputs of which are connected to the outputs of the third winding of the transformer, the first output of the first winding of the transformer is connected to the first output of the resistance, the second output of which is the first input of a parametric converter, the second input of which is the control input of the bidirectional key, The first and second outputs of the parametric converter are, respectively, the first terminals of the first and second windings of the transformer, the second terminals to which are connected to the common bus, the main transceiver contains up-threshold blocks, two time discriminators, a key and a pulse-width manipulator, the output of which is connected to the first input of the key, the second input of which is connected to the first input of the pulse-width manipulator and to the output of the first temporary a discriminator whose input is connected to the output of the first threshold unit, the input of which is connected to the input of the second threshold unit, the output of which is connected to the input of the second temporary discriminator whose output is with the second signal output of the main transceiver, the first and third signal outputs of which are respectively the key output and the output of the pulse width manipulator, the second input of which is the clock input of the main transceiver, the signal input of which is the input of the first threshold unit, and the peripheral transceiver contains NAND element, ready signal shaper, inhibit pulse shaper, clock selector, clock pulse and selector shaper op command pulses, the output of which is connected to the first input of the clock pulse generator, the second input of which is connected to the input of the ready signal generator and to the output of the inhibit pulse generator whose input is connected to the output of the clock pulse selector, the input of which is connected to the input of the command pulse selector, the first output the ready signal driver is connected to the first input of the NAND element, the second and third inputs of which are information inputs The peripheral transceiver, whose signal input is the input of the command pulse selector, clock, installation and signal outputs of the peripheral transceiver are the output of the clock generator, the second output of the ready signal generator and the output of the NAND element. ten