SU1238259A1 - Device for reception of discrete information - Google Patents

Abstract

The invention can be used in multichannel communication systems with static temporary compression. Noise immunity increases. The device: the device contains a matched filter 1, a maximum signal selection block (BVMS) 2, key blocks (KB) 3, information recovery channels 4, each consisting of three keys 5, two blocks of 6 memory, two elements And 7, an element OR 8, two control triggers (TU) 9, a cyclic pulse counter (S1SCH) 10, a decoder And and an output trigger 12, a divider 13, a clock synchronization unit 14, a sync delay line 15 and a driver of 16 cyclic pulses. The output effects of the matched filter 1-through open KB 3 simultaneously arrive at the BWMS 2. After making the decision of the BWMS 2 in favor of the i-ro channel signal, it is normalized about $ mxG (ОЛ "tv9

Description

1238259

impulse arrives at the single input information recovery 4. The goal

one of the TU 9. TU 9, in turn, is achieved by the introduction of BVMS 2, KB 3

generates a control signal for a single and TU 9. 1 Il. of CB 3 of the corresponding channel

The invention relates to a technique for transmitting discrete information and can be used in multichannel communication systems with statistical time multiplexing.

The purpose of the invention is to develop a resistance to stochasticity.

The drawing shows a structural electrical circuit of the proposed device.

A device for receiving discrete information contains a matched filter I, a maximum signal selection block 2, key blocks 3, information recovery channels 4, each of which consists of a first 5-, a second 5-2 and a third 5-3 keys, a first 6-1 and the second 6-2 block of memory, the first 7-1 and the second 7-2 of the elements I, the element SHSh 8, the first 9-1 and the direct 9-2 control triggers, the counter of 10 cyclic pulses, the decoder 11 and the output trigger 12, the divider 13, block 14 clock synchronization, line 15 delay synchiapd, driver 16 cyclic pulse s.

The device works as follows.

In the synchronous transmission method implemented on the transmitting side (not shown), either one of the 2N Channel signals or the sync signal not belonging to any of the serviced information signal sources (not shown) is input to the input of the matching filter 1. At the output of the matched filter I, the output response appears at random times that are multiples of the cycle time T of the channel signal. To transmit information from served sources of information signals, it is necessary to use at least two waveforms for each

Of these, with the aim of unambiguously distinguishing possible changes in the states of the sources of information signals. The time of arrival of the sync signal is preceded by the reception of a 2N + 1 waveform by a matched filter 1 and the simultaneous comparison of the output effects of a matched filter I in

Block 2, the selection of the maximum signal followed by the decision in favor of the 2N + 1 waveform. The unit amplitude sync pulse from the corresponding maximum signal selection unit 2, having passed through the clock signal delay line 15, goes in parallel to the control inputs of the third keys 5-3 of all information recovery channels 4 and simultaneously to the clock unit 14

synchronization to adjust the generator 16 cyclic pulses. When a channel signal about a change of state arrives at the next cycle, for example, the information signal at the output of matched filter 1 appears at the i-ro source. If a signal was sent to change the state of the source of the information signal from O to 1, then the response of the matched fstr I appears on the first wave, and if from 1 to O, it appears on the second. Output effects of matched filter 1 through open key blocks 3 arrive simultaneously

in block 2 of the selection of the maximum signal. In the case of a channel signal from the i-ro source of information signal, the output effect at one of the outputs of matched filter 1 at the cyclic time point will be compared with the others maximum, and therefore, the decision to receive the corresponding channel signal as a pulse of a single amplitude at one of the outputs block 2 you

to

3123825-9

borax of the max. signal will be given in favor of the i-ro source of the information signal,

Single amplitude pulses from the outputs of block 2 for selecting the maximum signal are received through the first 5-1 and second 5-2 keys of information recovery channel 4, which are controlled by a clock sequence of pulses from the first output of divider 13, to the single input of the first 6-1 and second 6-2 data storage channel A blocks, which store the transmitted state of the i-th source of the information-t5 signal, and simultaneously through the OR element 8 to the third key 5-3, which is controlled by the second input delayed by the loop clock signal coming from the delay line 15, 20 a clock signal. When the sync pulse delayed on the cycle and the now normalized (i.e. unit amplitude) channel pulse of the channel pulse of the information source i-ro coincide, the counter of the 10 i-ro information channel A is restored to zero, which, starting from i of the next cycle, starts counting the clock pulses coming from the second output of divider 13. From this moment, the corresponding data recovery channel A starts working .35

The state of the output trigger 12 depends on which output of the matched filter 1 has received information. An impetus to the WRI, arriving at the second inputs of the first 6-1 and second 6-2 memory blocks, sets them to the initial zero state. With the arrival of the channel pulse i-ro information source at another output of matched filter 1, the transmitted state is memorized by another storage unit 6-1, 6-2 of the same information recovery channel A, and the next HMP pulse goes through another element And 7-1., 7-2 to the second input of the output trigger 12 and zero inputs of the first 6-1 and second 6-2 memory blocks.

If the source of information does not change its state for a long time, i.e. At the input of the seal unit on the transmitting side, several I or O are received, then nothing is transmitted through this channel. The next pulses arriving at the inputs of the first 7-1 and second 7-2 elements And and zero inputs of the first 6-1 and second 6-2 memory blocks do not pass to the corresponding inputs of the output trigger 12. As a result, the output trigger 12 stably remains in original condition. When the counter 10 is completely filled with an IMR pulse, the counter 10 is reset.

in Oh. If there is a delay in the transfer of the moment of state change in any channel A, then the channel 40 received after the corresponding processing, which characterizes, for example, the transition from O to 1 is memorized, and only at the moment of arrival of the MRI does the output trigger 12 switch single state ..

7-1 and second 7-2 elements of And and j way, there is a pushing of each channel pulse, which characterizes the change of state of the i-th source of messages to the MRI of the given channel. The recovery of information of each subsequent channel A starts from the moment when, after the arrival of the sync pulse coming from the line. 15 delays the sync signal on the first 5-1 and second 5-2 keys, on the next cycle the channel impulse of the corresponding channel A comes and sets the counter 10 of this channel A to O.

When the counter 10 is completely filled, which is determined by the decoder I, the formation of a true regeneration moment (IMR) pulse, which comes from the output of the decoder 11, controlled by the clock sequence of pulses from the first output of the divider 13, to the first

the second inputs of the first 6-1 and second 6-2 memory blocks.

Depending on which of the memory blocks 6-1 or 6-2 memorizing the received state of the i-th source of the information signal, the memory block 6-1, 6-2 and generates the enabling signal dp of the first 7 -1 or the second 7-2 element And, passing the js pulse MRI from the output of the decoder 11 to the output trigger 12 for setting frk

W

New it in 1 or O

o

5 0 5 About

The state of the output trigger 12 depends on which output of the matched filter 1 has received information. An impetus to the WRI, arriving at the second inputs of the first 6-1 and second 6-2 memory blocks, sets them to the initial zero state. With the arrival of the channel pulse i-ro information source at another output of matched filter 1, the transmitted state is memorized by another storage unit 6-1, 6-2 of the same information recovery channel A, and the next HMP pulse goes through another element And 7-1., 7-2 to the second input of the output trigger 12 and zero inputs of the first 6-1 and second 6-2 memory blocks.

If the source of information does not change its state for a long time, i.e. At the input of the seal unit on the transmitting side, several I or O are received, then nothing is transmitted through this channel. The next pulses arriving at the inputs of the first 7-1 and second 7-2 elements And and zero inputs of the first 6-1 and second 6-2 memory blocks do not pass to the corresponding inputs of the output trigger 12. As a result, the output trigger 12 stably remains in original condition. When the counter 10 is completely filled with an IMR pulse, the counter 10 is reset.

j

js

W

After block 2 decides the choice of the maximum signal in favor of the i-ro channel signal, the normalized (i.e., unit amplitude) pulse from its corresponding output goes to the single input of one of the two control triggers 9-, 9-2, which in turn, it generates a control signal for one of the key blocks 3 of the corresponding information recovery channel 4. Thus, with the arrival of a channel signal, which characterizes the moment and type of transition of the state of the information source being served, its recovery begins in a certain information recovery channel 4 and at the same time, the input of this information channel is disconnected for the time during which guaranteed can not receive a channel signal characterizing the transition of the same type, i.e. if a sending impulse characterizing the O 1 type transition is received, then a similar transition can occur no earlier than 21, since at least I must receive the fixed impulse characterizing the type transition.

The removal of the control signal from the key blocks 3 was accomplished by installing the first 9-1 and second 9-2 control triggers to the initial zero state, which is performed by supplying impulses with the first 7-1 and second 7-2 elements And, the first trigger 9-1 of the control returns to the zero state by means of the pulse MRI, removed from the second element AND 7-2, and the second trigger 9-2 of the control returns to the zero state by means of the pulse WRI, removed from the first element And 7-1.

Thus, due to the disconnection after receiving the corresponding channel signals of the information outputs of matched filters 1 of these signals from the inputs of block 2 for selecting the maximum signal and connecting them only at the expected times of arrival of the channel signals to the input of block 2 for selecting the maximum signal, the output responses of matched filters 1, the number of which is less than N

F

(N is the total number of code forms).

Claims (1)

Invention Formula A device for receiving discrete information, containing a matched filter, the sync signal delay line whose input is connected to the input of a clock synchronization unit, the output of which through a cyclic pulse generator is connected to the divider input, and information recovery channels, each of which consists of three keys, two And elements, a cyclic pulse counter, two memory blocks, an OR element, a decoder and an output trigger, whose inputs are connected to the outputs of the first and second And elements, the first inputs of which are connected with the output of the decoder, to the first input of which the output of the cyclic pulse counter is connected, and with the first inputs of the first and second memory blocks, respectively, to the second inputs of which are connected respectively the outputs of the first and second keys, the control inputs of which are connected to the second input of the decoder and with the first output of the divider, the second output of which is connected to the first input of the cycle pulse counter, to the second input of which the output of the third key is connected, the control and signal inputs of which are connected But with the output of the sync signal delay line. And with the output of the IL element, to the inputs of which the outputs of the first and second keys are connected, and the outputs of the first and second memory blocks are connected respectively to the second inputs of the first and second elements AND, characterized by noise immunity, key blocks and a maximum signal selection block are entered into it, and two Fault triggers are entered into each data recovery channel, the single inputs of which are connected respectively to the signal inputs of the first and second keys and outputs a maximum signal selecting unit, to which inputs are connected the outputs of key blocks, control inputs of which are connected to the outputs of the first and second control flip-flops to zero inputs which 712382598 the outputs of the first blocks, the corresponding output and the second elements AND, are connected, respectively, and the maximum signal selection block of the outputs of the matched filter connectors to the input of the delay line is synchronized with the information inputs of the key signal.