JPS586439B2 - Office line hold circuit for button telephone equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a key telephone device, and more particularly to a central office line hold circuit for a key telephone device.

Conventional button telephone devices use cables with a large number of core wires to connect the main device and the telephone.

However, in recent years, systems have become larger and more multifunctional, and materials and labor costs have also increased, leading to an increase in system costs.

Therefore, providing a means for reducing the number of cable core wires is an effective means for reducing costs.

Therefore, as a means of reducing the number of cable core wires, it is common to move the switching of communication paths such as office lines from the current telephone set to the main unit, as is generally used in exchanges.

However, this conventionally used method has the disadvantage that the main device becomes large and expensive.

Regarding the holding system, conventionally, a means has been used in which time-division multiplexing is performed between the main device and the telephone to transmit central office line holding information.

However, these provide 91 time slots of pending information per station line, which requires many time slots for the means of transmitting said information from the telephone to the main unit, which results in an increase in the transmission frequency. This has become a practical obstacle as the number of station lines increases.

The present invention eliminates these drawbacks of the prior art and provides a central line hold circuit for a button telephone device that can realize a low-cost device that greatly reduces the number of cable cores between the main device and the telephone. .

Therefore, when a central office line is put on hold, the present invention transmits a central office line acquisition signal and one piece of holding information common to each central office line as a central office line holding signal from the telephone, and registers it in the main device. After receiving the information in a time-division manner, it is converted into hold information for each station line, and is sent to the station line circuit via a transmission bus in a time-division manner.The station line circuit then selectively receives the information and holds any station line. be.

That is, in order to achieve this object, the present invention provides a key telephone device in which a plurality of key telephones are selectively connected to a plurality of office lines using a main device, a plurality of call lines, and a plurality of control lines. The main device includes a clock pulse, a plurality of rows of modulation/demodulation high-speed time slot pulses corresponding to the central office line, a plurality of rows of low-speed time slot pulses for control signal transmission corresponding to the control line, a high-speed time slot pulse for reservation, and a low-speed time slot pulse for reservation. a first pulse generator L2, 4.5 that outputs a pulse, a plurality of circulating memos IJ12, 13.14 corresponding to the key telephone, and a central office line transmitted from the corresponding key telephone via the control line. A control output is sent to a corresponding one of the circular memory in synchronization with an AND output of a corresponding one of the plurality of rows of low-speed time slot pulses for control signal transmission and a corresponding one of the plurality of rows of modulation/demodulation high-speed time slot pulses. A plurality of first writing means 10 and IL 40 for writing, a plurality of first bistable circuits 60 respectively corresponding to the plurality of office lines, and a plurality of first bistable circuits 60 provided respectively corresponding to the plurality of first bistable circuits. and a plurality of second bistable circuits 61 that are reset by the output of the corresponding first bistable circuit, and a corresponding one of the plurality of second bistable circuits is in a predetermined state. A plurality of station line closing means 62, 63 for closing station lines.
, 64, and the corresponding one of the first bistable circuits is brought into the predetermined state by the read output of the contents of the circular memory obtained in a designated time slot of the modulation/demodulation high speed time slots. A plurality of first gate means 56, 57, 58 corresponding to central office lines, and hold control from the key telephone in synchronization with the AND output of the low-speed time slot for control signal transmission and the high-speed time slot pulse for holding. a plurality of second writing means 70, 7L for writing the output into a corresponding one of the plurality of circular memories;
9, 10, 11.40, and a plurality of third digits corresponding to the telephone set by an output read from a corresponding one of said circular memories in synchronization with said hold fast time slot.
bistable circuit 51, and a corresponding one of the states of the third bistable circuit causes a corresponding one of the contents of the plurality of circular memories to be applied to a corresponding one of the plurality of first gates. A plurality of third gate means 52, 53 compatible with telephones
and extracts an output from a corresponding one of the plurality of third gate means by a specified pulse of the modulation/demodulation high speed time slot pulse, and uses the output to output a corresponding one of the plurality of second bistable circuits. a plurality of second gate means 59 corresponding to central office lines for bringing one into the predetermined state; second pulse generating means 26, 27 for generating a holding synchronous time slot pulse substantially synchronized with the holding low-speed time slot;
28, operating means 33, 34, 73 including a plurality of office line telephone keys corresponding to the office line and one holding telephone key, AND output of the holding synchronization time slot Hals and the output of the holding telephone key and a suspension output means T14', 73, 31, 32, 36 for outputting the suspension control output to a corresponding one of the control lines by AND outputting the designated one of the synchronization time slot pulses and the synchronization time slot pulse; In any one of the plurality of button telephones, one of the specified central office lines is closed by the designated operation of the central office line key, and the closed central office line is placed on hold by the operation of the holding telephone key. This is a central office line holding circuit for a key telephone device characterized by the following features.

The present invention will be explained in detail below with reference to the drawings.

FIG. 1 is a block diagram showing the entire key telephone device related to the present invention. n is the central line,
100-1 and 100-n are office line circuits provided corresponding to the office lines, and each is connected to the data highway DH.

200-1...200-m are each telephone TEL-
1, . . . A telephone-compatible subscriber circuit connected to TEL-m.

TMU is 100-1...1 00-n, 200-1...
...200-m is a common circuit that generates a control signal for controlling the 200-m.

NET in TEL is a communication circuit, and CU is a telephone control circuit.

In order to explain the operation of the present invention in detail below, circuit diagrams of the route (100-1→DH→200-1→THL) in FIG. 1 are shown in FIGS. 2 and 3.

FIG. 2 is a circuit diagram for telephone communication according to the present invention,
1, 27 are counters, 2, 26 are clock pulse generators, 3, 4, 28 are decoders, 5, 10 are inverters, 8
, 11, 14, 15, 31 are AND gates, 7, 9, 1
2 and 32 are OR gates, 13 is a shift register, 16,
20, 21, 22 are time division switches, 17.23 is a low-pass filter, 19.25 is a transformer, 29 is a telephone communication circuit, 30.36 is a hook switch, 33, 34 are contacts of a telephone key for selecting a central office line, 35 is the power supply, 31, 38, 39 is the cable, 40 is the flip. Flop circuit, ■ indicates e}-MHO of the power supply, E indicates the (d) side of the power supply 3 and 10
0 is the office line circuit, 200 is the subscriber circuit, and the telephone bus A
, B, a plurality of office line circuits and a plurality of subscriber circuits are connected in parallel.

Here, multiple office line circuits connected in parallel are provided, one for each office line, but different time slots for gates of the time division switch are set depending on each office line. .

For example, in FIG. 2, this time slot is set to t1, but another station line is set to t3, the next time slot is set to t, and so on.

Here, in order to operate the above circuit, first, counters 1 and 27 are connected to clock pulse generators 2 and 26, respectively.
, and further assume that they are synchronized.

When the user raises the handset and presses the central office line key to make a call to the central office line, contacts 33 and 36 become connected.

As a result, the timing pulse of T'g among the output signals from the decoder 28 driven by the output signal of the counter 27 is [decoder 28 → contact 33 → OR gate 32 → AND gate 31 → cable 37 → flip-flop 40].
is applied to the input terminal of the flip-flop 40 via the route .

As a result of the above, a signal for selecting a central office line has been sent from the telephone to the main device.

The sent signal is received by the main device and shifted to shift register 1.
3 is stored.

Here, the timing at which the signal should be input to the shift register 13 will be explained.

First, the counter 1 is constituted by a plurality of pinary counters connected in cascade, and is driven by a clock pulse train ep which is the output of a clock pulse generator 2.

Output C1 of counter 1... A time chart of CIO is shown in FIG. 3.

Next, the output of the counter 1 drives the decoder 3 and the decoder 4, and the respective outputs t1...tn, T1...
Obtain T1o...Tn.

Here, T1...T1o...Tn are signals whose pulse width is synchronized with the period of the output C1O of the counter 1, as shown in FIG. 3.

Further, as shown in FIG. 3, t1...tn are signals whose pulse width is equal to the period of CP, and the pulse width of t1...tn is sufficiently small compared to the pulse width of T1...T. It is something.

Furthermore, signals T/1...T'n and T1... from the telephone
There is a relationship between TnOs as shown in FIG. 3, 2 and 3, and they are synchronized with a certain delay.

FIG. 31 is a diagram showing the timing of data sent to the central office line, and in the figure, LK, .

Further, T indicates a unit time in which T1...T are time slots.

As is clear from this figure, the transmission signal TS from the telephone to the main device is delayed by a certain period of time with respect to T.

This delay is to correct the synchronization difference between the counter 1 and the counter 27 by receiving the signal near the center of the pulse width when the main device receives the signal.

In FIG. 2, the flip-flop 40 is of a type that outputs an output at the rising edge of the gate pulse CIO.

Therefore, as described above, when the input signal T'9 is applied here, it is output to the output side of the norip-flop 40 in synchronization with the gate pulse CtO, and is applied to one of the input terminals of the AND gate 11.

As described above, due to the synchronization relationship between T1o and C1o, the output signal of flip-flop 40 at this time is synchronized with TIO.

Here, C1o is the output of counter 1. Next, the output terminal of the shift register 13 is fed back to the input terminal of the shift register 13 via [the output terminal of the shift register 13 → the AND gate 14 → the OR gate 12], and the shift register 13 is shifted by the clock pulse CP. The input information is configured to be circulated and stored at a constant cycle.

Therefore, in order to input the signal to the shift register 13,
A timing pulse is output from the OR gate 9 by a circuit constituted by the AND gate 8 and the OR gates 7 and 9, and the output signal is applied to the AND gate 14 through the inverter 10 to close it.

The other signal is applied to the AND gate 11 to open it, thereby inputting the signal applied from the flip-flop 40 to the shift register 13 through the OR gate 12.

Here, this input timing is the TIO and t1
+ t2, the storage location in the shift register 13 is also fixed and one cycle later tl t
In this way, in order to synchronize the input and output of the shift register 13, the storage capacity of the shift register 13 is set to be the same as the steps t1...t of one cycle of the decoder 3. It is set.

As described above, the office line signal TI input from the telephone is converted to the timing j1 p L2, which is further processed by the AND gate 15 with a pulse at the timing C1, so that only t1 is utilized, and the time division switch 16.20
is applied to the gate terminal of

Here, 01 is the output of the first stage of counter 1.

As described above, the time division switches 21 and 22 installed in the office line circuit 100 and the time division switches 16 and 20 installed in the subscriber circuit 200 are opened at the same timing, and calls between the office line and the telephone are This is possible with the following route.

That is, the transmission signal from the office line excites the transformer 25,
Depending on the output, [secondary winding 25-2 of transformer 25→
Hybrid 24 → Time division switch 21 → Call bus B →
Time division switch 16 → low pass filter 17 → hybrid 18 → primary side 19-1 of transformer 19 → earth E]
The communication current flows through the route, excites the transformer 19, and its output is [transformer 190 secondary side (upper) winding 19-2→
Cable 38 → Hook switch 30 → Call circuit 29 → Cable 39 → Secondary side (lower) winding of transformer 19 19-3
→Power source 35], the telephone current flows through the route and is received by the telephone.

In addition, the transmission signal from the telephone energizes the transformer 19 through the same route as described above, and its output causes [the primary winding 19-1 of the transformer 19 → the hybrid 18 → the time division switch 20
→Call bus A→Time division switch 22→Filter 23→・
・Ibrid 24→Transformer 250 Secondary winding 25-2→
A communication current flows through the route of earth E to excite the transformer 25, and the signal is induced in the primary winding of the transformer 25 and sent to the office line.

Here, the signals on call buses A and B are PAM modulated.

Also, although only one office line circuit, one subscriber circuit, and one telephone are shown in Figure 2, they are actually connected through the communication bus A and B terminals, which are part of the data highway DH, as shown in Figure 1. are connected in parallel.

That is, assume that five circuits are connected in parallel to call buses A and B.

The gate pulse to the gate of this time division switch is t
(For circuit 100), j3 s j5 t j7+
Set it like t.

In this case, the OR gate I and the AND gate 8 are provided for each office line, and the input signal t1j of the OR gate 7 is
t2 and the signals corresponding to the input signal T1o of the AND gate 8 are respectively applied to the station line circuit gate pulses t1...t,
corresponding to j1 + j2 ” j3 + t4 + j5
t j6 * j7, t8; t,, t1o and T1ot
TB r T12 + T13? Set to T14,
Each of these circuits is condensed by an OR gate 9.

In this state, when another office line is selected and a pulse T'IO is received from the telephone, t1 is
It becomes possible to communicate with the office line circuit to which the gate pulse has been assigned.

As described above, it is possible to talk to any office line by selecting the office line key of the telephone.

Further, in FIG. 2, subscriber circuits are also connected in parallel through call buses A and B, but in this case, the operation is similar to that of circuit 200, and communication with any central office line is possible.

Also, in the above explanation, the time slots of the time division switch are set as j1+j3yj5..., and the storage capacity of shift register 3 is used twice as much as the required number.
This is set every other bit, and this improves the crosstalk characteristics during channel switching.

However, in order to save storage capacity, it is possible to stop every other bit and use the entire storage capacity continuously.

Note that the above explanation does not mention the synchronization system between the clock t1 and the clock pulse generator 26 and between the counter and the counter 27, but since these can be used, they will not be explained here. Omitted.

In addition, although the above embodiment is explained using a shift register, instead of this shift register, a delay line memory, a random access memory, etc. can be used as a circular memory that is program-controlled by a processor and operates in the same manner as described above. It is also possible to use

Next, station line acquisition in the present invention will be explained with reference to FIG.

The difference between Fig. 2 and Fig. 4 is that Fig. 4 is the circuit 65 of Fig. 2.
1 circuit 51...7
One part has been added.

In FIG. 4, 1 and 27 are counters, 2 and 26 are clock pulse generators, 3, 4 and 28 are decoders, and 5 and 10 are
, 54, 56, 68 are inverters, 8, 1 1, 14,
15, 31, 5253, 57, 58, 59, 70 are AND gates, 7, 9, 1 2, 32, 55, 62, 71 are OR gates, 13 is a shift register, 19.25 is a transformer, 1 9-2. 1 9-3 is the secondary winding of the transformer 19, 29 is the telephone communication circuit, 30.36 is the hook switch, 33, 34 are the contacts of the telephone key for selecting the office line, 73 is the contact of the telephone key for holding, ■ is the power supply (G) side, E is the (D) side of the power supply, 40, 5L 60, 61 are flip-flop circuits, 6
3 is a transistor, 64 is a relay, 64-1 is its contact, 66 is a photo coupler, and 67-1, 67-2 is a dial connection point.

In order to acquire the central office line, the input of central office line acquisition information from the telephone to the shift register 13 is the same as in the previous case.

Next, the output of the AND gate 53 obtained as above is passed through the OR gate 55 and the AND gate 58 allows only the output at the timing t1 to pass therethrough, setting the flip-flop 60.

Further, when the input of the inverter 56 is at a low level (that is, there is no signal input) at the timing t1, the flip-flop 60 is reset.

Therefore, the flip-flop 60 continues to be set only as long as the telephone key 33 is kept pressed, the pulse TIg is repeatedly sent from the telephone at the cycle of the counter 27, and the output of the shift register 13 is present. It will be reset when it is cut off.

By setting the flip-flop 60, its output terminal becomes high level, and the emitter-collector of the transistor 63 is turned on level KL through the OR gate 62, thereby operating the disconnector 64 and connecting its contact 64-1.

As described above, a DC loop is formed for the station line, and the station line is captured.

Note that although Fig. 4 shows the case where there is one office line and one telephone, a circuit of 100a is connected in parallel to point A in the figure, and the input signals t1 of AND gates 5γ and 58 are t1+t3, respectively.
+t5y, t7t, tg, etc., it is possible to selectively capture multiple office lines from the telephone.

If a large number of telephones are used, this can be done by connecting the circuit 200a in parallel to point A in the figure.

Next, the operation of a system for transmitting dial impulse information from a telephone to a central office line will be explained.

Dial contact information on the telephone is obtained by detecting the next change in loop current using a photo coupler 66 in the main device.

First, on the input side of the photo coupler 66, [(+) side of power supply 35 → secondary winding 19-2 of transformer 19 → hook switch 30 → dial contact (impulse contact) 67-
1 → Dial contact (shunt contact) 67-2 → Input side of photo coupler 66 → Secondary winding 19-3 of transformer 19
→In the loop of ←}10) of the power supply 35, the contact 6T-2 is connected and the contact 67-1 is connected and disconnected by operating the dial, so that the DC current is interrupted and the photo cutter is connected due to the current change. Dial information is output to the output side of the plug 66, and the output signal controls the AND gate 53 through an inverter 68.

As a result, the AND gate 53 outputs the logical product of the output signal from the shift register 13 and the photocoupler 66, and in the same manner as described above, the AND gate 53 outputs the AND gate 55 and the AND gate 53. 57,5
8. Set or reset flip-flop 60 through the circuit of inverter 56.

Here, the cycle of the decoder 3 is set to be sufficiently small compared to the intermittent cycle of the contact 67-1.

This is so that even if the contact 67-1 is disconnected immediately after timing t2 and the inverter output 68 becomes low level, the flip-flop 60 continues to be set until t2 comes after the next cycle. .

Therefore, an error corresponding to one cycle of the maximum decoder 3 will occur.

The above conditions are necessary to reduce this error,
This can be made sufficiently small because it is determined independently of the transmission path between the telephone and the main device.

The operation of capturing the central office line has been described above, and next we will explain the operation of operating the hold telephone key on the telephone in this state to place the central office line on hold.

The hold information from the telephone is sent in the same way as the central office line acquisition information.

When the telephone hold key is pressed in the above-mentioned state where the central office line is captured, the contact point 7
3 becomes a contact, and the signal T'14 from the decoder 28 passes through the contact 73 and is input to the shift register 13 through the same path as described above.

At this time, the time slots for input to the shift register 13 are t1 and t2.

Next, the output signal of the shift register 13 sets the flip-flop 51 at timing t12.

Here, it is assumed that the flip-flop 51 is of the same type as the flip-flop 40.

Therefore, the flip-flop 51 at timing t1
.

After the next cycle? 1, and the output of the logical AND between the output of the shift register 13, the station line capture information at the timing t2, and the timing C1 of the counter 1, that is, the output of the AND gate 52, is output to the OR gate 55 and point A ( transmission bus) through and gate 5
9 input.

On the other hand, with the arrival of the suspension information, the output of the AND gate 53, which has been output so far, is blocked by the inverter 54.

Therefore, since the flip-flop 60 is reset, the reset terminal P of the clip-flop 61 becomes a roll bell.

Also, the output terminal Q of the flip-flop 60 becomes high level, and this, the signal from the point A, and the timing t2 cause the AND gate 59 to output, the flip-flop 61 is set, and its output Q is passed through the OR gate 62. , the transistor 63 is turned on, the relay 64 is driven, its contact 64-1 is connected, and the central line is held.

Here, the telephone keys 33, 34, and 73 are locked by pressing the commonly used interlocking telephone key, that is, the office line key, and when the held telephone key is pressed and released, when it is restored, the office line key is also restored. It is a structure.

Therefore, by releasing the held telephone key, the central office line and the held telephone key are restored, the contacts 33 and 73 are disconnected, and the input to the shift register 130 is also disconnected, thereby clearing the situation.

Therefore, flip-flop 60 is reset and clip-flop 61 remains set.

Next, when the central office line key is pressed again, the contact 33 becomes connected, and the flip-flop 60 is set in the same manner as in the case of acquiring the central office line, and the output Q resets the flip-flop 61 and holds it. is canceled.

The operations of calling, capturing, and holding a call on the central office line have been explained above, but the above-mentioned central office line acquisition method is not only used for simply acquiring the central office line, but also for transmitting other information, such as information on the short contact 67-2 of the dial. It can be applied as a means to eliminate the influence of the inductance of the primary winding of the transformer 25 when transmitting a dial impulse to the central office line, that is, when transmitting a dial impulse.

An example of the implementation circuit is shown in FIG.

The differences between Figure 5 and Figure 2 are 1.2, 3.4 from Figure 2.
is omitted, inverter 91, AND gates 92, 93
, flip-flop 94, transistor 95, contact 9
A relay 96 having contacts 6-1 and 96-2 is added, and the insertion position of the contact 67-2 is changed.

Here, when the dial is wound up in FIG. 5, its contact 67-2 becomes connected, and in the same way as the operation described in FIG. It is output at the same timing, and the route is [AND gate 53 → OR gate 55 → AND gate 92 → flip-flop 94 → transistor 950 pace], and a voltage is applied to the base of transistor 950.
Turn it on, operate the relay 96, and its contacts 96-
1.96-2 are brought into contact, thereby shorting the primary winding of the transformer 25.

As a result of the above, it is possible to eliminate the influence of the inductance of the transformer 25 when transmitting dial impulses.

Next, a secret story in the method of the present invention will be explained.

FIG. 6 is an example of a secret circuit used in the method of the present invention. Comparing FIG. 2 and FIG. 6, FIG. 6 shows the circuit 20 of FIG.
0, part of shift register 13, and gate 1
1, 14, an OR gate 12, an inverter 10, and a flip-flop 40 as a circuit 201, a shift register 213, AND gates 211, 21
4, OR gate 212, inverter 210, flip
It is constructed in the same manner as the flop 240, with the addition of AND gates 216 and 218, inverters 215 and 254, and a flip-flop 251.
01 is a circuit similar to 201.

Also, 400 is an or gate. Here, in order for FIG. 6 to operate as a secret call circuit, when the telephone connected to circuit 201 presses LK, to enter a call on the office line when the office line is idle, it must be shifted as explained in FIG. 2. The station line selection information LK1 is input and stored in the register 213.

In this case, telephone calls using 201 are possible.

Next, in this state, when the telephone connected to circuit 301 attempts to enter a call on the central office line and presses central telephone key LK1, the signal for LK1 is input to flip-flop 340 as explained in FIG. Set and gate 311
is applied to one input of

Here, since the information stored in the shift register 213 is output at the timing of jl y j2 as described above, it is outputted to the clip and input via the route of [AND gate 218 → OR gate 400 → AND gate 316 → inverter 315]. It is applied to the other input of AND gate 311 in a manner that blocks the signal from flop 400.

Here, inverter 217 and AND gate 216 prevent AND gate 211 from being blocked by the output signal from shift register 213.

Therefore, input to the shift register 313 is blocked, so it is not possible to enter a talking state.

Also, in this state, the flip-flop 251 and shift register 313 have no output, and the inverters 254 and 354 have no output.
output is at high level.

With the above operation, only the telephone that first captures a single central office line can communicate when the central office line is empty.

Next, in the state described above, only one telephone set can be connected to one central office line.

However, in actual use, it is sometimes necessary to connect two or more telephones.

In this method, a method for implementing this will be described below.

When the telephone key HK mounted on the telephone is pressed in Fig. 6, the contact HK becomes connected, and the signal T/14 is sent to the main device in the same manner as above, and at the timing shown in Fig. 3, 5 and 6. It is stored in the shift register 13.

The HK information stored in the shift register 213 is tll
It is output at the timing of tl2 and sets the flip-flop 251.

Here, the flip-flop 251 is a D-type flip-flop that is set by a trigger pulse ttz.

The output of flip-flop 251 then goes high, which is applied to AND gate 218 through inverter 254 to prevent the output signal of shift register 213 from passing through it.

As a result of the above, the output signal of the OR gate disappears, and the LK information can be input to the shift register 313.

The above operation allows two or more telephones to make calls on one central office line.

Although the central office line in the above description has been described as a subscriber line connected to an exchange, the present invention can be applied to an extension line of a private branch exchange also being regarded as the central office line.

As described in detail above, according to the present invention, it is possible to greatly reduce the number of cable cores between the main device of a button telephone device and the telephone, which conventionally used a large number of cable cores, thereby saving resources and reducing costs. , the practical effects such as improved reliability are significant.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing the overall configuration of the system of the present invention, Fig. 2 is a circuit diagram for explaining the communication system in the system of the present invention, Fig. 3 is a time chart for explaining the operation, and Fig. 4 is a diagram of the system of the present invention. FIG. 5 is a circuit diagram showing a partial modification of the circuit shown in FIG. 4, and FIG. 6 is a circuit diagram illustrating the secrets of the button telephone device related to the present invention. This is a complete circuit diagram.

Claims (1)

[Claims] 1. In the main device, the station line acquisition information and station line hold information in serial signal format transmitted through specified time slots corresponding to multiple station lines are converted into parallel signal format and stored in multiple corresponding locations. 1st and 2nd temporarily stored in the element
a temporary storage means, a closing means for forming a DC current closed loop with the office line with the output of the first storage means, and a plurality of circulating memories provided corresponding to the plurality of button telephones; output pulses synchronized with the output pulses of the first pulse generating means to each of the plurality of button telephones connected to the main device via a control line. a second pulse generating means; and a control information transmitting means for extracting control information for selecting a central office line and holding a central office line by using the output of the second pulse generating means and operation of a central office line selection operation telephone key and a telephone holding telephone key. The main device further includes a writing means provided in the main device for receiving and detecting the control information and writing it to a specified address of the circulating memory according to the detection result, and writing means for writing the central line reservation in the circulating memory. switching means for blocking the station line selection information and outputting the suspension information when the information is stored, and outputting the station line information only when there is no suspension information and the station line selection information is present; The output of the switching means is
one of the plurality of office lines designated via the control line by the office line selection telephone key operation on the button telephone set is put on hold by the holding telephone key operation. A central office line hold circuit in a button telephone device.