JPS587119B2 - Central line acquisition circuit for button telephone equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a button telephone device, and more particularly to a central office line acquisition circuit for a button telephone device.

Conventional button telephone devices use cables with a large number of core wires to connect the main device and the telephone.

However, in recent years, systems have become larger and more multifunctional, and materials and labor costs have also increased, leading to an increase in system costs.

Therefore, providing a means for reducing the number of cable core wires is an effective means for reducing costs.

Therefore, as a means of reducing the number of cable core wires, it is common to move the switching of communication paths such as office lines from the current telephone set to the main unit, as is generally used in exchanges.

However, this conventionally used method has the disadvantage that the main device becomes large and expensive.

The present invention eliminates these drawbacks of the prior art and provides a central line capture circuit for a button telephone device that can realize a low-cost device that greatly reduces the number of couple core wires between the main device and the telephone. .

Therefore, when capturing a central office line, the present invention transmits the central office line acquisition signal from the telephone in a time-divided manner at low speed, receives it in a speed conversion register in the main device, and sends dial or hook information to the high-speed output. etc., the output is spatially divided, and then an arbitrary station line is captured.

In order to achieve this object, the present invention provides a button that selectively connects a plurality of button telephones to a plurality of central office lines using a main device, a plurality of telephone sets, and a plurality of control lines. In the telephone device, the main device includes a first generator for generating a clock pulse, a plurality of rows of modulation/demodulation high-speed time slot pulses corresponding to the central office line, and a plurality of rows of low-speed time slot pulses for control signal transmission corresponding to the control line. pulse generators 1.2, 4.5 and an i corresponding to said button telephone.
A circular memo J12.13.14 of the number and the control output transmitted from the corresponding button telephone via the control line to a corresponding one of the slow time slot pulses for control signal transmission of the plurality of columns and the control output transmitted from the corresponding button telephone via the control line. a plurality of writing means 7, 8, 9.10.11.40 for writing into a corresponding one of said circular memories in synchronization with an AND output with a corresponding one of the modulation/demodulation high speed time slot pulses; A plurality of first bistable circuits 60 each corresponding to a central office line, and when one corresponding one of the plurality of first bistable circuits is in a predetermined state, a corresponding one of the plurality of central office lines. a plurality of closing means 62, 63, 64 corresponding to the central office line for closing the
The content of a corresponding one of the plurality of circular memories is read out in synchronization with a corresponding one of the plurality of rows of modulation/demodulation high-speed time slot pulses, and the corresponding one of the plurality of first bistable circuits is read out using the readout output. first gate means 56, 57, 58 corresponding to the central office line to bring the above-mentioned predetermined state to
and a second pulse generator for generating a synchronous time slot pulse that is substantially synchronized with a corresponding one of the plurality of rows of low-speed time slot pulses for transmitting control signals, in each of the plurality of button telephones. 26.27.28
and 1,000-step operation including multiple office line telephone keys compatible with office lines 33,3
4, and control output means 31.32.3 for taking out the control output from the corresponding button telephone by AND outputting the output of the operating means and the synchronous time slot pulse.
6, one of the central office lines designated by the control output sent by a designated operation of the central office line telephone key in any one of the key telephones is closed. This is a central office line acquisition circuit for a button telephone device.

Further, the telephone current supply means 35 and the telephone current detection means 66
By providing the second gate means 53, the DC dial pulse can be transmitted to the central office line.

Further, in the main device, a wire ring 25 is inserted in series with the closing means 64-1, and a plurality of third bistable circuits 94 corresponding to the office line, a plurality of shorting means 96-1, 96-2 and a plurality of By providing the fourth gate means 91, 92, 93, the wire ring 25 can be short-circuited when dial pulses are transmitted.

The present invention will be explained in detail below with reference to the drawings.

FIG. 1 is a block diagram showing the entire key telephone device related to the present invention, and shows C0.1...CO. n is the central line, 1
00-1 and 100-n are office line circuits provided corresponding to office lines, and each is connected to the data/way DH.

200-1...200-m are each telephone TEL-
1, . . . A telephone-compatible subscriber circuit connected to TEL-m.

TMU is ioo-i...100-n. 200-1...
・This is a common circuit that generates a control signal to control the 200-m.

NET in TEL is a communication circuit, and CU is a telephone control circuit.

In order to explain the operation of the present invention in detail below, circuit diagrams of the route (100-1→DH→200-1→TEL) in FIG. 1 are shown in FIGS. 2 and 3.

FIG. 2 is a circuit diagram for telephone communication according to the present invention,
1.27 is a counter, 2, 26 is a clock pulse generator, 3.4.28 is a decoder, 5.10 is an inverter, 8
．． 11.14, 15, 31 are and gates, 7.9.1
2.32 is an OR gate, 13 is a shift register, 16.
20.21.22 is a time division switch, 17.23 is a low-pass filter, 19.25 is a transformer, 29 is a telephone communication circuit, 30.36 is a hook switch, 33.34 is a telephone key contact for selecting a central office line, and 35 is a A power supply, 37, 38, and 39 are cables, 40 is a flip-flop circuit, ■ indicates the (power) side of the power supply, and E indicates the (→) side of the power supply.

Further, 100 is an office line circuit, 200 is a subscriber circuit,
Call bus A. A plurality of office line circuits and a plurality of subscriber circuits are connected in parallel through B.

By the way, multiple office line circuits connected in parallel are provided, one for each office line, and the time slot for the gate of the time division switch is set to be different depending on each office line. .

For example, in Figure 2, this time slot is t1,
Another station line is set as t3, the next one is set as t5, etc.

Here, in order to operate the above circuit, first, counters 1 and 27 are connected to clock pulse generators 2 and 26, respectively.
, and further assume that they are synchronized.

When the user raises the handset and presses the central office line telephone key to make a call to the central office line, contacts 33 and 36 become connected.

As a result, the timing pulse of T'9 of the output signal from the decoder 28 driven by the output signal of the counter 27 is transmitted through the route of [decoder 28 → contact 33 → OR gate 32 → AND gate 31 → cable 37 → flip-flop 40]. It is applied to the input terminal of flip-flop 40.

As a result of the above, a signal has been sent from the telephone to the main device indicating that the central office line cannot be selected.

The sent signal is received by the main device and transferred to the shift register 13.
be ated.

Here, the timing at which the signal should be input to the shift register 13 will be explained.

First, the counter 1 is constituted by a plurality of pinary counters connected in cascade, and is driven by a clock pulse train ep which is the output of a clock pulse generator 2.

A time chart of the outputs C1...CtO of the counter 1 is shown in FIG. 3.

Next, the decoder 3 and decoder 4 are driven by the output of the counter 1, and the respective outputs t1...jl, Tl...
Obtain T1o/...Ty.

T1...-T1o...En is as shown in FIG. 32,
t1...tn are signals whose pulse width is the period of the output CIO of the counter 1 and are synchronized with this, and t1...tn are signals whose pulse width is the period of CP as shown in FIG.
... The pulse width of t1...tn is sufficiently small compared to the pulse width of Tn.

Furthermore, signals T1...T'n and T1...T from the telephone
There is a relationship between n and n as shown in FIG. 3, 2 and 3, and they are synchronized with a certain delay.

FIG. 3 is a diagram showing the timing of data in the case of five office lines. In the figure, LK1...LK5 indicate signals for the office line telephone keys, respectively.

Further, T indicates a unit time in which T1...Tn are time slots.

As is clear from this figure, the transmission signal T'6 from the telephone to the main device is delayed by a certain period of time with respect to T9.

This delay is for correcting the synchronization difference between the counter 1 and the counter 27 by receiving the signal near the center of the pulse width when the main device receives the signal.

In FIG. 2, the flip-flop 40 is of a type that outputs at the rising edge of the gate pulse C10.

Therefore, as described above, when the input signal T'6 is applied here, it is output to the output side of the clip flop 40 in synchronization with the gate pulse C10, and is applied to one of the input terminals of the AND gate 11.

As described above, due to the synchronization relationship between T10 and C10, the output signal of the flip-flop 40 at this time is synchronized with T10.

Here, C1o is the output of counter 1. Next, the output terminal of the shift register 13 is fed back to the input terminal of the shift register 130 via [the output terminal of the shift register 13 → the AND gate 14 → the OR gate 12], and the shift register 13 is shifted by the clock pulse CP. The input information is configured to be circulated and stored at regular intervals.

Therefore, in order to input the signal to the shift register 13,
A timing pulse is output from the OR gate 9 by a circuit constituted by an AND gate 8 and OR gates 7 and 9, and one of the output signals is applied to an AND gate 14 through an inverter 10 to close it.

The other signal is applied to the AND gate 11 to open it, thereby inputting the signal applied from the flip-flop 40 to the shift register 13 through the OR gate 12.

Here, this input timing is T1o and t1
, t2, the storage location in the shift register 13 is also fixed and needs to be output at timings t1 and t2 one cycle later.

In this way, in order to synchronize the input and output of the shift register 13, the storage capacity of the shift register 13 is set to be equal to the steps t1...tn of one cycle of the decoder 3.

As described above, the office line signal Ta9 input from the telephone is converted to timings tl and t2, which are further converted to t1 by the pulse at timing C1 at the AND gate 15.
is applied to the gate terminal of the time division switch 16.20.

Here, C1 is the output of the first stage of counter 1.

As described above, the time division switches 21 and 22 installed in the office line circuit 100 and the time division switches 16 and 20 installed in the subscriber circuit 200 are opened at the same timing, and calls between the office line and the telephone are This is possible with the following route.

That is, the transmission signal from the office line excites the transformer 25,
By its output, [the secondary winding 25-2- of the transformer 25
−Print 24 → Time division switch 21 → Call bus B →
Time division switch 16 - low pass filter 17 -> hybrid 18 -> primary side 19-1 of transformer 19 -> ground E]
A communication current flows through the route, excites the transformer 19, and its output is [secondary side (upper) winding 19-2- of the transformer 19].
Cable 38 → Hook switch 30 → Call circuit 29 → Cable 39 → Secondary side (lower) winding of transformer 19 19-3
The communication current flows through the route of the power supply 35] and is received by the telephone.

In addition, the transmission signal from the telephone energizes the transformer 19 through the same route as above, and its output causes [transformer 190 primary winding 19-1→Ct lid 18→time division switch 201 call bus A→time division switch 22→filter 23→hybrid 24→secondary winding 25-2 of transformer 25→earth E], the communication current flows through the route of Sent out.

The signals on communication buses A and B are PAM modulated by RR.

Also, although only one central office line circuit, subscriber circuit, and telephone are shown in Figure 2, they are actually connected through the communication bus A and B terminals, which are part of the Data Neuway DH, as shown in Figure 1. are connected in parallel.

That is, now, call bus A. Assume that five circuits are connected to B in series.

At this time, the gate pulse to the gate of the time division switch is 1
1 (in the case of circuit 100), t3, t5, t7, and tg. In this case, OR gate T and AND gate 8 are provided for each station line, and OR gate 7
0 input signal t1, ta and input signal T of AND gate 8
1o corresponding to the station line circuit gate pulses t1...t9, respectively, t1yt2:t3.4;t
5・t6; t7, t8; t9・tlO and T10・T1
1T12, T13+T14, and concentrating each circuit with an OR gate 9.

In this state, when another office line is selected and the pulse T'io is received from the telephone set, it becomes possible to communicate with the office line circuit to which the gate pulse tl has been assigned, in the same way as in the operation described above.

As described above, it is possible to talk to any office line by selecting the office line key of the telephone.

In FIG. 2, the subscriber circuit also connects to the call bus A. In this case, the circuit 200 operates in the same way as the circuit 200 and allows communication with any office line.

Also, in the above explanation, the time slot of the time division switch is set as tl + t3 + t5, etc., and the storage capacity of the shift register 13 is used twice as much as the required number, and is set every other bit. However, in order to save memory capacity, it is possible to stop using every other bit and use the entire memory capacity continuously.

Note that the above explanation does not mention the synchronization system between the clock t1 and the clock pulse generator 26, and between the counter 1 and the counter 27, but since these can be used, they will be explained here. omitted.

The above embodiments are explained using a shift register, but instead of this shift register, a delay line memory or a random access memory can be program-controlled by a processor or the like and used as a circular memory that operates in the same way as described above. It is also possible to use

Next, station line acquisition in the present invention will be explained with reference to FIG.

The difference between Fig. 2 and Fig. 4 is that Fig. 4 is the circuit 65 of Fig. 2.
The illustration of the detailed circuit in the circuit 51 is omitted, and the circuit 51...
71 parts have been added.

In FIG. 4, 1, 27 are counters, 2, 26 are clock pulse generators, 3, 4, 28 are decoders, 5, 10
．． 54.56.68 is inverter, 8,11.14.1
5.31, 52.53, 57, 58.59.70 are AND gates, 7.9.12.32.55.62.71 are OR gates, 13 is a shift register, 19.25 is a transformer, 19-2. 19-3 is the secondary winding of the transformer 19, 2
9 is a telephone communication circuit, 30 and 36 are hook switches, 3
3 and 34 are the contacts of the telephone key for selecting the central office line, 73 is the contact of the telephone key for holding, ■ is the power supply side, E is the power supply q(1) side, 40
, 51.60.61 is a flip-flop circuit, 63 is a transistor, 64 is a relay, 64-1 is its contact, 66
is a hot coupler, and 67-1.67-2 is a dial contact.

In order to acquire the central office line, the input of central office line acquisition information from the telephone to the shift register 13 is the same as in the previous case.

Next, the output of the AND gate 53 obtained as above is passed through the OR gate 55 and the AND gate 58 allows only the output at the timing t1 to pass through, and the flip-flop 60 is set.

Further, when the input of the inverter 56 is at a low level (that is, there is no signal input) at the timing t1, the flip-flop 60 is reset.

Therefore, only as long as the telephone key 33 is kept being pressed, the pulse T6 is repeatedly sent from the telephone at the cycle of the counter 27, and the output of the shift register 13 is present, the Frisop/Flosog 60 continues to be set, and the signal is It resets when it is cut.

By setting the flip-flop 60, its output terminal goes to the high level, which turns on the emitter and collector of the transistor 63 through the OR gate 62, operating the relay 64, and connecting the contact 64-1 to the central line. In contrast, a DC loop is formed to capture the central line.

Although FIG. 4 shows a case where there is one office line and one telephone set, a circuit 100a is connected in parallel to point A in the figure, and the input signal t1 of ANDG}57.58 is connected to jl. t3+t
By changing the line to 5+t7*Eo, etc., it is possible to selectively capture multiple office lines from the telephone.

If a large number of telephones are used, this can be done by connecting the circuit 200a in parallel to point A in the figure.

Next, the operation of a system for transmitting dial impulse information from a telephone to a central office line will be explained.

Dial contact information on the telephone is obtained by detecting the next change in loop current using a photovoltaic coupler 66 in the main device.

First, on the input side of the photo coupler 66, [(1) side of power supply 35 → secondary winding 19-2 of transformer 19 → hook switch 30 → dial contact (impulse contact) 67-1
→ Dial contact (shunt contact) 67-2 → Input side of photo coupler 66 → Secondary winding 19-3 of transformer 19 →
In the (c) side loop of the power source 35, by operating the dial, the contact 67-2 is connected and the contact 67-1 is connected, so that the DC current continues, and due to the current change, the photocasoplast 66 Dial information is outputted to the output side of the dial, and the output signal controls the AND gate 53 through an inverter 68.

As a result, the AND gate 53 outputs the logical product of the output signal from the shift register 13 and the photocassoplast 66, and in the same manner as described above, the AND gate 53 outputs the OR gate 55, AND gate 57, 5
8. Inverter 560 circuit. to set or re-center the flip-flop 60.

Here, the cycle of the decoder 3 is set to be sufficiently small compared to the intermittent cycle of the contact 67-1.

This is so that even if the contact 67-1 is disconnected immediately after timing t2 and the inverter output 68 becomes low level, the flip-flop 60 continues to be set until t2 comes after the next cycle. .

Therefore, an error corresponding to one cycle of the maximum decoder 3 will occur.

The above conditions are necessary to reduce this error,
This can be made sufficiently small because it is determined independently of the transmission path between the telephone and the main device.

The operation of capturing the central office line has been described above, and next we will explain the operation of operating the hold telephone key on the telephone in this state to place the central office line on hold.

The hold information from the telephone is sent in the same way as the central office line acquisition information.

When the telephone holding key is pressed in the above-mentioned state where the central office line is captured, the contact 73 becomes connected, and the signal TH14 from the decoder 28 passes through the contact 73 and is sent to the shift register 13 through the same route as above.
is input.

At this time, the time slots for input to the shift register 13 are t1 and t2.

Next, the output signal of the shift register 13 is sent to the flip-flop 51 at the timing tl2.

Here, it is assumed that the flip-flop 51 is of the same type as the flip-flop 40.

Therefore, the flip-flop 51 has a timing tl
Outputs high level from 2 to tl2 after the next cycle,
The AND gate 52 outputs the output of the AND gate 52 with the station line capture information at the timing t2 and the timing C1 of the counter 1, which is the output of the shift register 13, and passes through the OR gate 55 and point A (transmission bus) to the AND gate 52.
9 input.

On the other hand, with the arrival of the suspension information, the output of the AND gate 53, which has been output so far, is blocked by the inverter 54.

Therefore, the flip-frog 60 is reset, and the reset terminal R of the flip-frog 61 becomes low level.

Also, the output terminal Q of the flip-flop 60 becomes low level, and this, the signal from the point A, and the timing t2 cause the AND gate 59 to output, the flip-flop 61 is set, and its output Q is passed through the OR gate 62. , the transistor 63 is turned on, the relay 64 is driven, its contact 64-1 is connected, and the central line is held.

Here, the telephone keys 33, 34 and 73 are locked by pressing the commonly used interlocking telephone key, that is, the office line key, and when the held telephone key is pressed and released, when it is restored, the office line key is also restored. It is a structure.

Therefore, by releasing the held telephone key, the central office line and the held telephone key are restored, the contacts 33 and 73 are disconnected, and the input to the shift register 13 is also disconnected, thereby clearing the data.

Therefore, the flip-flop 60 is re-centered and the flip-flop 61 remains set.

Next, when the central office line key is pressed again, the contact 33 becomes connected, and the flip-flop 60 is set in the same manner as in the case of acquiring the central office line, and the output Q resets the flip-flop 61 and holds it. is canceled.

The operations of calling, capturing, and holding a call on the central office line have been explained above, but the above-mentioned central office line acquisition method is not only used for simply acquiring the central office line, but also for transmitting other information, such as information on the short contact 67-2 of the dial. It can be applied as a means for eliminating the influence of the inductance of the primary winding of the transformer 25 when transmitting the dial impulse to the office line, that is, when transmitting a dial impulse.

An example of the implementation circuit is shown in FIG.

The differences between Figure 5 and Figure 2 are 1.2, 3.4 from Figure 2.
is omitted, inverter 91, AND gates 92, 93
, flip-flop 94, transistor 95, contact 9
A relay 96 having 6-1.96-2 is added, and the insertion position of the contact 67-2 is changed.

Here, when the dial is wound up in FIG. 5, its contact 67-2 becomes connected, and is stored in the shift register 13 at timing t1 in the same way as the operation described in FIG. It is output at the same timing, and a voltage is applied to the base of the transistor 95 via the route [AND gate 53 → OR gate 55 → AND gate 92 → flip-flop 94 → base of transistor 95].
Turn it on, operate the relay 96, and its contacts 96-
1.96-2 are brought into contact, thereby shorting the primary winding of the transformer 25.

As a result of the above, it is possible to eliminate the influence of the inductance of the transformer 25 when transmitting dial impulses.

Next, a secret story in the method of the present invention will be explained.

FIG. 6 is an example of a secret circuit used in the method of the present invention. Comparing FIG. 2 and FIG. 6, FIG. 6 shows the circuit 20 of FIG.
0, part of shift register 13, and gate 1
1.14, the circuit composed of the OR gate 12, the inverter 10, and the flip-flop 40 is used as the circuit 201, and the shift register 213 and the AND gates 211, 21
4, OR gate 212, inverter 210, flip
The circuit 3 is constructed in the same manner as the flip-flop 240, with the addition of AND gates 216 and 218, inverters 215 and 254, and a flip-flop 251.
01 is a circuit similar to 201.

Also, 400 is an or gate. Here, in order for FIG. 6 to operate as a secret call circuit, when the telephone connected to the circuit 201 presses LKI to enter a call on the office line when the office line is idle, the shift register is activated as explained in FIG. 2. The station line selection information LK1 is input and stored in 213.

In this case, telephone calls using 201 are possible.

Next, in this state, when the telephone connected to circuit 301 attempts to enter a call on the central office line and presses central telephone key LK1, the signal for LK1 is input to flip-flop 340 as explained in FIG. Set and gate 311
is applied to one input of

Here, since the information stored in the shift register 213 is output at the timings t1 and t2 as described above, it is [AND gate 218 → OR gate 400
-> AND gate 316 -> inverter 315] and is applied to the other input of the AND gate 311 in such a way as to block the signal from the flip-flop 400.

Here, the inverter 217 and the AND gate 216 prevent the AND gate 211 from being blocked by the output signal from the shift register 213. Therefore, since the input to the shift register 313 is blocked, the call state cannot be entered. Can not.

Also, in this state, the flying flop 251 and shift register 313 have no output, and the inverters 254 and 354 have no output.
The output is on Hylepel.

With the above operation, only the telephone that first captures a single central office line can communicate when the central office line is empty.

Next, in the state described above, only one telephone set can be connected to one central office line.

However, in actual use, there are times when it is desired to connect two or more telephones.

In this method, a method for implementing this will be described below.

When the telephone key HK shown in FIG. 6 is pressed, the contact HK becomes closed, and the signal T'F4 is sent to the main device in the same manner as described above, and at the timing shown in FIG. 3, 5 and 6. It is stored in the shift register 13.

The HK information stored in the shift register 213 is tl1
It is output at the timing of +jl2 and sets the flip-flop 251.

Here, the flip-flop 251 is a D-type flip-flop and is set by the trigger pulse t12.

The output of flip-flop 251 then goes high, which is applied to AND gate 218 through inverter 254 to prevent the output signal of shift register 213 from passing through it.

As a result of the above, the output signal of the OR gate disappears, and the LK information can be input to the shift register 313.

The above operation allows two or more telephones to make calls on one central office line.

Although the central office line in the above description has been described as a subscriber line connected to an exchange, the present invention can be applied to an extension line of a private branch exchange as well, considering it as the central office line.

As described in detail above, the present invention makes it possible to greatly reduce the number of cable cores between the main device of a button telephone device and the telephone, which conventionally used a large number of cable cores, thereby saving resources and reducing costs. , the practical effects such as improved reliability are significant.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the overall configuration of the system of the present invention, Fig. 2 is a circuit diagram for explaining the communication system in the system of the invention, Fig. 3 is a time chart for explaining the operation, and Fig. 4 is a diagram of the invention. FIG. 5 is a circuit diagram showing a partial modification of the circuit shown in FIG. 4, and FIG. 6 is a circuit diagram illustrating the secrets of the button telephone device related to the present invention. This is a complete circuit diagram.

Claims (1)

[Scope of Claims] 1. A plurality of storage elements in the main device that convert station line acquisition information in a serial signal format transmitted through time slots specified corresponding to a plurality of station lines into a parallel signal format and correspond to each one. a temporary storage means for temporarily storing data in the telephone, a closing means for forming a DC current closed loop with the central office line using the output of the storage means, and a plurality of circulation memories provided corresponding to the plurality of button telephones; a first pulse generating means for outputting an output pulse synchronized with the output pulse of the first pulse generating means to each of the plurality of button telephones connected to the main device via a control line; a second pulse generating means, and a control information transmitting means for extracting control information for selecting a central office line using the output of the second pulse generating means and a central office line selection operating key; , comprising a writing means provided in the main device for receiving and detecting the torpedo information and writing the detection result to a designated address of the circulating memory, and directing the output of the circulating memory to the temporary storage means. Particularly, a central office line acquisition circuit in a button telephone device configured to acquire one of the plurality of central office lines specified via the control line by operating the central office line selection telephone key on the button telephone. 2. In a button telephone device in which a plurality of key telephones are selectively connected to a main device and a plurality of central office lines using a plurality of call lines and a plurality of control lines, the main device is provided with an evening lock pulse and a plurality of central office lines. a first one for generating a plurality of rows of modulation/demodulation high-speed time slot pulses corresponding to the control line and a plurality of rows of low-speed time slot pulses for control signal transmission corresponding to the control line;
a pulse generator, a plurality of circulating memories corresponding to the button telephones, and a plurality of low-speed time slot pulses for transmitting control signals to the plurality of rows of pulse outputs transmitted from the corresponding button telephones via the control line. a plurality of writing means for writing into a corresponding one of said circular memories in synchronization with an AND output of a corresponding one and a corresponding one of said plurality of trains of modulation/demodulation high speed time slot pulses; a plurality of bistable circuits corresponding to each other; and a plurality of bistable circuits each corresponding to a central office line that closes a corresponding one of the plurality of central office lines when one corresponding state of the plurality of bistable circuits is in a predetermined state. a closing means, which reads the contents of the corresponding one of the plurality of circular memories in synchronization with the corresponding one of the plurality of rows of modulation/demodulation high-speed time slot pulses, and uses the readout output to read out the contents of the corresponding one of the plurality of bistable circuits. a plurality of first gate means corresponding to central office lines for bringing one into the predetermined state; a plurality of telephone current supply means corresponding to telephones respectively connected to the plurality of telephone lines; a plurality of telephone current detection means each inserted into a corresponding telephone line to detect the presence of a telephone current flowing through a corresponding telephone line; a corresponding one of said plurality of circulating memories; and said plurality of first gate means; a plurality of second gates that are provided between the corresponding one and corresponding to the telephone set and are controlled by a detection output obtained by detecting the interruption of the telephone call current by the on/off control of the dial contact of the corresponding telephone set by the telephone current detection means; means, each of the plurality of button telephones having a second pulse generator for generating a synchronous time slot pulse substantially synchronized with a corresponding one of the plurality of rows of slow time slot pulses for transmitting control signals; a control output means for extracting the control output from the corresponding button telephone by AND outputting the output of the operation means and the synchronization time slot; The button is characterized in that one of the central office lines designated by the control output sent by a designated operation of the central office line telephone key in any one of the button telephones is closed. Central line capture circuit for telephone equipment. 3. In a button telephone device in which a plurality of key telephones are selectively connected to a plurality of office lines using a main device and a plurality of call lines and a plurality of control lines, the main device is provided with a clock pulse and a function corresponding to the office line. a fourth column for generating a plurality of rows of modulation/demodulation high-speed time slot pulses and a plurality of rows of low-speed time slot pulses for control signal transmission corresponding to the control line;
a pulse generator, a plurality of circulating memories corresponding to the button telephones, and a control output transmitted from the corresponding button telephones via the control line to the plurality of rows of low-speed time slot pulses for transmitting control signals; a plurality of writing means for writing into a corresponding one of the circular memories in synchronization with an AND output of one of the plurality of modulation/demodulation high speed time slot pulses and a corresponding one of the plurality of trains of modulation/demodulation high speed time slot pulses; a plurality of corresponding bistable circuits; and a plurality of closing lines corresponding to the central office lines that close a corresponding one of the plurality of central office lines when one corresponding one of the plurality of bistable circuits is in a predetermined state. a connecting means, and reads out a corresponding one of the plurality of circulating memories in synchronization with a corresponding one of the plurality of rows of modulation/demodulation high-speed time slot pulses, and depending on the readout method, a corresponding one of the plurality of bistable circuits. a plurality of first gate means corresponding to a central office line for bringing one into the predetermined state; and an output of a dial short contact (shunt contact) and the synchronization time slot pulse for each of the plurality of button telephones. The main device includes a control output means for taking out the control line output from the corresponding button telephone according to the AND bet, and the main device inserts a wire in series with the closing means, and connects the plurality of stations. a plurality of third bistable circuits respectively corresponding to the wires; and when one corresponding state of the plurality of third bistable circuits is in a predetermined state, the wire loops correspond to the plurality of station lines. a plurality of short-circuiting means for short-circuiting the plurality of third cyclic memories; and a plurality of short-circuiting means for reading out a corresponding one of the plurality of cyclic memories in synchronization with a corresponding one of the plurality of rows of modulation/demodulation high-speed time slot pulses, and using the readout output to short-circuit the plurality of third further comprising a fourth gate means corresponding to a central office line, which sets a corresponding one of the bistable circuits in the predetermined state to the predetermined state; A central line capture circuit for a button telephone device designed to short-circuit.