SU1665357A1 - Device for algebraic addition of pulse-frequency signals - Google Patents

Abstract

The invention relates to automation and computing and can be used as an element of the automatic control system. The purpose of the invention is to simplify the device and improve the accuracy of the summation. The algebraic summing device of the frequency-pulse signals contains the first generator of 1 clock frequency, counters 2, 3 pulses, microprogram control unit 4, controlled frequency divider 5 and the second and third generators 6, 7 of clock frequencies interconnected functionally. 1 il.

Description

ABOUT

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The invention relates to automation and computing and can be used as an element of the automatic control system.

The purpose of the invention is to simplify the device and improve the accuracy of the summation.

The drawing shows the functional diagram of the device.

The algebraic summing device of the frequency-pulse signals contains the first clock frequency generator 1, the first and second counters 2 and 3 pulses, the microprogram control unit 4, the controlled frequency divider 5, and the second and third clock frequency generators 6 and 7 interconnected functionally.

The algebraic summing device of the frequency-pulse signals must ensure the conversion of the input pulse signals with the frequencies fi and fa a and the output pulse signal f according to the formula

f fi ± f2 .. (1)

The device works as follows.

The counting inputs of counters 2 and 3 from the clock frequency generator 1 are given a signal with a frequency of 1Т1. The inputs of the installation to zero of the counters 2 and 3 are fed to the input pulse signals of the device with frequencies, respectively, ft and ft. Upon the arrival of the next pulse to the input of the installation of zero of counter 2, its outputs establish the code of the number of pulses of the 1 clock frequency generator received from the moment of the preceding impulse to the input of the installation of zero of counter 2, after which the counter 2 continues counting the pulses of the clock frequency generator 1 . Thus, at the outputs of counter 2, a code of the number NI is formed, proportional to the period Ti 1 / fi:

(2)

-,

Counter 3 operates in a similar way; at its outputs, a code Na is formed, which is proportional to the period Ta in 1 / h

. (3)

The codes NI and N2 generated in this way come to the microprogram control unit 4 (which, for example, can be executed in the form of a micro-computer), which ensures their conversion by the formula

w - NlN3. (41

 N2 ± Ni w

The transformation (4) in block 4 of the firmware control is clocked by the pulses of the output signals of the generators 6

and 7 clock frequencies, respectively, and ttz (), arriving at the interrupting inputs of the microprogram control unit 4 according to the expressions

К -№ / (№ ± N1) with frequency тт2, (5.1)

N KNi with frequency bz, (5.2)

Or according to the expressions

AN rtf / (N2 ± Ni) with a frequency of fa, (6.1) N N1 ± A N with a frequency of 1tz. (6.2)

The code of the number N from the output of the microprogram control unit 4 is fed to the control input of the controlled frequency divider 5, the counting input of which receives the reference frequency fTi from the output of the 1 clock frequency generator. The frequency f at the output of the controlled divider 5 frequency (at the output of the device) is equal to

f fn / N. (7)

Taking into account expressions (4), (3) and (2), the output frequency f in formula (7) is determined by the required relation (1).

The characteristic of the proposed device in terms of accuracy and degree of non-uniformity of the one-pulse sequence is determined by choosing the reference frequency fTi and the size P of the information inputs and output of the microprogram control unit based on the specified frequency ranges f 1 and f2 of the input signals.

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Claims (1)

An invention of an algebraic summation device of frequency-pulse signals, comprising first and second clock generators, first and second pulse counters, and a controlled frequency divider, the output of which is connected to the output of the device, characterized in that, in order to simplify and improve the accuracy of summation, it introduced the third clock generator and the microprogram control unit, the information inputs of the first group of which are connected respectively to the bit outputs of the first impulse counter In other words, the information inputs of the second group of the firmware control block are connected respectively to the bit outputs of the second pulse counter, the counting input of which is connected to the counting input of the first pulse counter, the clock input of the controlled frequency divider, and the setting O of the first pulse counter connected to the first information input of the device, the second information input of which is connected to the installation input 5.16653576 in About the second pulse counter, the control of which is connected to the output of the second the inputs of the controlled clock frequency generator, and the second input You are connected to each other by splicing a microprogrammed block with the abrasive outputs of the microprogramming unit connected to the output of the third hermem control, the first input of the clock frequency pre-circuit 5.