SU1654834A1 - Device of correlation handling - Google Patents

Abstract

The invention relates to automation and computing and can be used in devices for sample recognition, coordinate calculation. The purpose of the invention is simplification. The device contains shift registers 1-3, multipliers 4 and 7, a generator of 5 clock pulses, an adder 6, a switch 8. 1 Il.

Description

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The invention relates to automation and cleaning technology and can be used in devices for the correlation processing of signals from matrix sensors, in particular in devices for

samples, in devices of coordinates.

The purpose of the invention is to simplify the implementation.

The drawing shows a diagram of the proposed device.

The device contains shift registers 1-3, a group of 4 multipliers, a generator of 5 clock pulses, an adder 6, a multiplier 7, a switch 8, a start input 9 5, the first 10 and a second 11 information inputs, an input 12 of the mask code.

The device works as follows ./

If the two-dimensional information signal has K rows, each of which has L samples, and the size of the reference signal (reference) is M × W, then to obtain the first reference correlation function, it is necessary to combine the reference with the signal. In each of the first M lines of the signal, only the first N samples take part in the calculation process. This corresponds to the area of single mask code values. The remaining signal samples do not contribute to the result of the calculation. These samples correspond to zero mask code values. The linear correlator must have a number of stages not less than (L x (M-1) + N).

Prior to the formation of the correlation function, the required mask code is written to register 3. For this, the clock pulse generator 5 generates a control signal by which the switch 8 connects the input 12 of the mask code to the input of the register 3. At the same time, the clock pulses from the generator 5 begin to arrive, shifting the contents of the register 3.

After completion of the mask code entry, the reference input begins. In this case, generator 5 generates a control signal, by which the output of the third register is connected to its input through a switch, and clock pulses for shifting in the second and third registers. The mask code, circularly to register 3, controls the input of the pattern c. using multiplier 7 (once

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The standard input corresponds to one shift cycle of the mask code in register 3). The reference (for line-by-line reading) is fed to the second information input 11, modulated by the mask code as it passes through the multiplier 7, and goes to the second register 2.

Thus, in case of line-by-line and sequential input of the standard in the second register 2 after the 1, 2, ..., (M-1) -th row is entered by (L-N) counts of zero 5

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after the M-th row, the zero-value readings are entered before the remaining part of the reference register is filled, if there is one.

To form each sample of the correlation function, including the first one, (M-1) x L + N samples of the information signal are entered into the first register 1 (sequentially and sequentially). The formation of samples of the correlation function is performed by sequentially shifting the contents of the first register 1, transmitting signals from the taps of the first register 1 to the adder 6 through multipliers 4-1, 4-2, ..., 4-p. The mode of operation (transmission coefficient) of the group multipliers is set by the magnitude and sign of the reference samples transmitted from the taps of the register 2.

The formation of subsequent samples of the correlation function is performed in a similar way. For this (L-N + 1), the next count of the correlation FUNCTION is determined once. Moreover, at the end of each clock cycle, the computations in the first register 1 advance the signal counts by one clock cycle, while the count entered first in register 1 is output from it; at the same time, the remaining samples stored in register 1 are shifted by one cell and introduced into register 1 the next sample of the information signal.

Repetition (L-N + 1) of the operation of forming the reference of the correlation function and shifting the contents of the first register 1 is equivalent to forming the correlation function samples obtained by sequentially moving the reference along the first M lines of the input signal from the initial position at which N initial samples are multiplied , Each of the M first lines of the information signal, to the corresponding samples of the standard, to the final position at which the last N is weighed from 5165

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Next, the signal samples in the first register 1 are advanced to (W-1) time, during which the correlation function is not formed because of the incorrect position of the standard relative to the signal, which is associated with sequential processing of two-dimensional signals by a sliding window. This sec, on (Ы-1) beat of the contents of the regs yu 1 is equivalent to a shift of the reference relative to the signal from the final step to the initial position, but on a line to a chuke. I

The ventures repeat (K-M + 1) times the cycle of operations consisting of (L-N + 1) -ro shaping cycle, which includes the generation of correlation function counts and a shift by one clock cycle of signal counts in register 1, as well as from promotion of the contents of register 1 to () an act during which the correlation function samples are not formed.

Performing (K-M + 1) cycle times, opera hy is equivalent to forming the correlation function samples, obtained by moving the reference from the initial position relative to the first M lines, signals the final position relative to the last M lines of the signal by progressive scanning.

Changing the format of the standard and the length of the signal line is done by writing a new mask code.

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Claims (1)

Claims An apparatus for correlation processing comprising three shift registers, a multiplier group, a clock generator and an adder, the information input of the first shift register being the first information input of the device, the bit outputs of the first shift register are connected to the first inputs of the corresponding group multipliers, bit the secondary outputs of the second; and the left shift register - with the second inputs of the corresponding group multipliers, the outputs of which are connected to the corresponding inputs of the adder, the output of which The device’s output is characterized in that, for the sake of simplicity, the device comprises a multiplier and a switch, the first input of the multiplier is the second information input of the device, the first information input of the switch is the input of the device mask code, the output of the multiplier is connected to the information input of the second shift register, the output of the switch is with the information input of the third shift register connected to the second input of the multiplier and the second five the switch's inormating input, the nc control input of which is connected to the first clock generator output, the second one: which is connected to the clock inputs of the first, second and third shift registers, the clock generator start input is the device start input.