SU1643954A1 - Device for measurement of rate of change of temperature - Google Patents

Description

one

(21) 4694639/10 (22) 05.27.89 (46) 04.23.91. Bul №15

(71) Kiev Polytechnic Institute. 50th anniversary of the Great Oct. Brno socialist revolution

(72) A.G.Protasov, V.M. Sineglazoy and V.I. Tsedik

(53) 536.53 (088.8)

(56) USSR Author's Certificate No. 767563, cl. G 01 K 7/02, 1980.

USSR author's certificate N 1525476, cl. G 01 K 7/00. 1987

(54) DEVICE FOR MEASURING THE SPEED CHANGE OF TEMPERATURE

(57) The invention relates to thermometry and allows for improved measurement accuracy.

rates of temperature change and extend the measurement range towards negative temperature changes. The output of temperature sensor 1 is amplified by amplifier 2 and stored in sampling-storage unit 16, and then converted into a pulse frequency using voltage-frequency converter 15. The output pulses of the voltage-frequency converter 15 are counted by a reversible counter 9. The modes of operation of the reversible counter 9 are controlled by the shaper of 4 time intervals. The output code of the reversible counter 9 undergoes additional transformations, after which, through the selector 28, as a result of the measurement, it is fed to a digital indicator 11. 1 sludge.

ABOUT

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The invention relates to the field of temperature measurements, namely, devices for measuring the rate of change of temperature, and can be used in automated control systems.

The purpose of the invention is to improve the measurement accuracy and extend the measurement range towards negative temperature changes.

The drawing shows a block diagram of the proposed device.

A device for measuring the rate of change of temperature contains a temperature sensor 1, an amplifier 2, a generator of 3 clock pulses, a 4-slot driver (PVI), the first, second and third outputs of which are connected to the corresponding information inputs of the first switch 5 connected by control inputs decoder 6 and the control inputs of the second switch 7, and the outputs with the corresponding control inputs of the first frequency divider 8, the first and second outputs of which are connected to the corresponding control inputs of the reversible counter 9, the second frequency divider 10, digital indicator 11, the logic element OR NOT 12, the first logic element NOT 13, the first counter 14, the voltage converter - frequency 15, the information-storage-storage unit 16 (BVH) , shaper 17 control pulses, third switch 18, second counter 19, third frequency divider 20, delay element 21, RS flip-flop 22, counter. 23 with preset, the first logical element OR 24, the logical element AND 25, the fourth switch 26, the forward code to additional converter 27, the selector 28, the second logical element. NOT 29 and the second logical element OR 30.

A device for measuring the rate of change of temperature operates as follows.

The signal from the temperature sensor 1 is amplified by the amplifier 2 and fed to the WI-16. The BVH-16 in the sampling mode stores the instantaneous value of the signal, and then switches to the storage mode on command. The clock pulses of the 3-clock pulse generator go through the third frequency divider 20 to the FWI 4 and the control pulse shaper 17, which, on the front of the incoming pulse, forms a short control pulse and controls the operation of the CVI 16. The CVM is used to eliminate

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nor the dynamic measurement error of temperature, which may occur due to the discrepancy between the recorded time points and the measured instantaneous temperature values, since each instantaneous temperature value is converted into a digital code not instantly, but for a certain period of time, during which the temperature can change its value. With BVH, a fixed (filled) instantaneous value of the signal is fed to a voltage converter — frequency 15, which generates pulses with a frequency Tism proportional to the measured temperature. The pulses from the output of the voltage-frequency converter 15 are fed to the counting input of the reversible counter 9, which counts their number when there are control signals on the first and second inputs, the frequency of which depends on the magnitude of the temperature change. The control signals form the FWI 4 of the clock pulses coming from the frequency divider 20, From the first and second outputs of the PVI 4, the information inputs of the switch 5 are pulses with a duration of 1 second to control the reversible counter 9. The periods of these pulses are Ti Ta Tz, but their sequences differ in phase relationships. The pulses at the second input of the switch 5 are shifted in time with respect to the pulses at the first input by 35 t3 Ti / 2. The duration of these pulses is stabilized and equal to 1 s. Pulses with a duration of 1 / fr are applied to the third information input of the switch 5 with FVI 4 to reset the reversible counter 9. Their temporary position corresponds to the position of the falling edge of the pulses at the second input of the switch 5, From the output of the switch 5 controlled by the decoder 6, the pulses go to the input the frequency divider 8, in which, depending on the magnitude of the temperature change, the following frequency is divided by the appropriate number of times (1, 2, 3 n). With

on the appearance of a pulse on the first control input of the reversible counter 9, the summing up of 1 s of pulses arriving at its counting input from the voltage converter - frequency 15 takes place. Then, after a time interval Ti / 2, the second control input of the reversing counter 7 appears impulse, and the reversible counter 9 performs the subtraction of pulses arriving at the counting input during 1 s. From the output of the reversible counter 9 parallel binary code

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proportional to the magnitude of the temperature change, is fed to the code converter, which is necessary to obtain the number-pulse code and the subsequent frequency division of this code according to the required algorithm.

The code converter contains a generator of 3 clock pulses, a counter 23 with a preset, a logical element OR 24, a logical element AND 25 and operates as follows.

When the power is turned on, all bits of the counter 23 with the preset are set to zero. In this case, the first input of the logic element And 25 receives clock pulses from the generator 3 clock pulses, however, from the output of the element And 25 pulses do not arrive at the counting input of the counter

23, since at the second input of the AND 25 element there is a zero level that came from the output of the OR 24 element. With the appearance at the installation input of the counter 23 of the pulse from the third output of the first frequency divider 8, the counter 23 receives the parallel code from the reversible counter 9. In case the code is nonzero, the output of the logical element OR

24, which means that the logic input 1 appears at the second input of the logic element AND 25, and the pulses from the clock pulse generator 3 pass through the logic element 25 and arrive at the counting input of the counter 23, which subtracts them. When, as a result of the subtraction, all bits of the counter 23 are set to zero, the output of the logic element OR 24, and therefore, the second input of the logic element AND 25 again has a logic level O, and this element ceases to pass to its output the generator pulses 3 clock pulses. Thus, the number of pulses in the packet, which appeared at the output of the logic element AND 25, is equal to the number recorded in counter 23 from the reversible counter 9 in the parallel binary code.

Further, these pulses through the switch 7, controlled by the signal from the decoder 6 (like switch 5), go to frequency divider 10, which also, like frequency divider 8, divides the pulse frequency into the appropriate number, depending on the magnitude of the temperature change. times (1. 2, 3p).

After dividing, the pulses from the output of frequency divider 10 are fed to summing counter 19, which performs the inverse transformation of the number-pulse code into a parallel binary code. In this case, if the magnitude of the temperature change over the time interval Ti / 2 is higher than the sensitivity threshold of the device, then on the reversible counter 9, and hence on the summing counter 19, a number 5 is fixed that is proportional to the rate of temperature change. Then, a parallel-binary code of this number passes through a negative number extraction system (switch 26, direct code converter to 10 additional 10 and selector 28) and is displayed on the digital indicator board 11. If the amount of temperature change during the Ti / 2 time interval is below the sensitivity threshold device, the system automatically selects the desired time interval Ti / 2, over which the magnitude of the temperature change becomes available for measurement. This happens as follows. If in the counter 19 the left number is written down, then at the output of the OR-NOT 12 logic element a signal appears in the form of logical 1. which goes to the first control input of the switch 18. With the arrival of this pulse, the switch 18 transmits the pulse that came to it the information input from the third output of the div, frequency 8, to the counting input of counter 14, which controls the operation of the decoder 6, and the decoder provides simultaneous connection of the outputs of the PVI 4 and logic gate 25 through the switches 7 and 5 to the inputs of the dividers 10 and 8 of the frequency about baking division of the frequency of incoming pulses by 2 times.

5 If the time interval Ti / 2 again proves insufficient to measure the magnitude. changes in temperature, the frequency of the pulses coming from the AND 25 and FVI 4 is reduced by 3,

0 4, ... n times until counter 19 records a measurement result other than zero. Then, at the output of the logical element OR-NOT 12, a zero level appears, which is fed to the input of the logical

5 of the HE element 13, and from the output of this circuit, a single signal hits the second control input of the switch 18. When another pulse appears at the information input of this switch, then the average transmits this pulse through the logic element OR 30 to the control input of the counter 14, reset. After that, the circuit is ready for the next measurement. If the magnitude of the temperature change is less than the threshold of sensitivity of the device, even at the time interval Tn, the signal from the last filled bit of the counter 14, passed through the logical element OR 30, resets this counter and also prepares the circuit for

next dimension. In addition to the signals from the output of counter 19, pulses are received from the third output of frequency divider 8 to the input of the NLI-NOT 12 logic element, gating the operation of the OR-NOT 12 logic element for the duration of these pulses. Such a build-up is necessary to avoid the erroneous operation of the counter 14 and the decoder b, which controls the accuracy of the meter, with a negative temperature change. In this case, the number of counting pulses arriving at the counting input of the reversible counter in the subtraction mode is larger than in the summation mode, and the output at this counter is inevitable when all the bits are set to zero.

A parallel binary code, propo- sional of the rate of change of temperature, from counter 19 is fed to a negative number extraction system, which works as follows. With a negative temperature change at the output of the overflow, when a reversible counter 9 is subtracted, a pulse arises in each counting cycle, which sets the RS flip-flop 22 to one. This level at the output of the trigger 22 enters the digital indicator 11 to indicate a negative sign, and also switches the switch 26 and the selector 28 so that the parallel binary code from the counter 19 enters the converter 27, where it is converted into an additional code, and then passes to the indicator 11. At the end of the counting cycle, the RS flip-flop is reset to zero by a reset pulse, which arrives at its second input from the third output of frequency divider 8, and the system is reset. In the event of a positive change in the temperature at the output of the RS flip-flop 22, a zero potential is set, which switches the switch 26 and the selector 28 so that the parallel binary code from the counter 19 passes directly to the inputs of the digital indicator 11.

Claims (1)

The invention The device for measuring the rate of temperature change, containing a series-connected temperature sensor, amplifier, sampling-storage unit, voltage-frequency converter and reversible counter, to the first and second control inputs of which the first frequency divider is connected to the inputs of which, through first switch connected outputs time generator, clock generator, control driver, output connected to the control input of the block sample storage, a first counter connected in series, a decoder connected to the control inputs of the first switch, a second switch and a second frequency divider, and a digital and digital switch, characterized in that, in order to increase the accuracy of measurement and extend the range of measurements, the side of the temperature changes, and he entered in series 5 counter with preset, connected to the outputs of the reversible counter, the logical element OR and the logical element AND, the second input connected to the output of the clock, and the output to 0 clock input of the counter with presetting and to the information input of the second switch, third frequency divider, input connected to the output of the clock generator, and output to the inputs of the forwarder of control pulses and time interval generator, sequentially connected to the first logical element NOT, logical element OR -NO, the second logical element is NOT, 0 the third switch and the second logical element OR, connected to the control input of the first counter, connected in series the second counter, the fourth switch, the forward code converter into 5 additional and selector, outputs connected to a digital indicator, delay element connected between the third output of the first frequency divider and the third control input of the reversible counter, RS trigger, the first input of which is connected to the overflow output when the reversing counter is subtracted, the second input is connected the installation input of the counter with a preset, the information input of the third switch, the input of the first logic element is NOT and is connected to the third output of the first frequency divider, and the output is connected to control inputs of the fourth switch, selector 0 and a digital indicator, and the output of the logical element IPI is NOT connected to the second input of the third switch, the second output of which is connected to the information input of the first counter, the last 5 whose output is connected to the second input of the second logical element OR, the outputs of the second counter are connected to the corresponding inputs of the logical element OR — NOT, the second group of outputs of the fourth switch is connected to the second group the selector inputs, the output of the second splitter of the frequency splitter is connected to the corresponding frequency, connected to the counting input of the second outputs of the time counter generator, and the control inputs of the first interval.