SU1635186A1 - Device for controlling the switching of redundant units - Google Patents

Abstract

The invention relates to computing and can be used in automatic control systems. The aim of the invention is to expand the functionality of the device by providing a test mode of operation. The device for controlling the switching of the backup units contains the main and backup units 1, the nodes 2 of the embedded control of the blocks 1, the output switch 3, the three-input element AND 4, the block 5 of the switching control, the switch 6 of operation modes and the failure trigger 7. Switching the reserve is made depending on the values of the signals at the outputs of the nodes 2 of the built-in control taking into account the health of the nodes of the reserved blocks 1 at the previous stages of operation. 1 hp f-ly, 2 silt, 3 with SS /;

Description

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The invention relates to computing and can be used in automatic control systems. The purpose of the invention is to expand the functional capabilities of the device by providing a test mode of operation.

FIG. 1 shows a structural diagram of the proposed device} in FIG. 2 is a functional block switching control circuit.

The device for controlling the switching of the backup units contains the main and backup blocks 1, the nodes 2 of the built-in control of the main and backup blocks, the output switch 3, the three-input element AND 4, the block

5 control switching switch

6 operation modes, trigger 7 failures, information outputs 8 of the main and backup units, output 9 of the node 2 of the built-in control of the main unit

1, output 10 of node 2 of the built-in control of the backup unit 1, input 11 set the reserve code, input 12 set the operation mode (main-check) input 13 of the device synchronization, input 14 set, input 15 set K and the node to be executed, information outputs 16 devices, outputs 17 and 18 of the mode switch, indicator failure output 19 of the device, switch control output 20, indicator outputs 21 and 22 of the main and backup blocks at the moment of failure.

The switching control unit 5 contains a decoder 23, the first group of elements AND 24.1-24.P, a group of registers 25.1-25. Configuration control (PAN), the first element NOT 26, the second and third groups of elements 27.1-27.n and 28.1- 28.n respectively the first multi-input element OR 29, the second multi-input element OR 30, the three-input element AND 31, the second and third elements NOT 32 and 33, respectively, the element OR 34, the first 35 with inverse output and the second 36 AND elements, respectively.

The operation of the device is based on the sequential processing of errors caused by the occurring failures. At the same time, it is assumed that the switch speed is sufficient to perform the necessary switchings until the next failure occurs.

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The device remains operational until the simultaneous occurrence of a failure in each unit.

Along with universal equipment, there can be N sub-blocks (functional units) in the main and backup blocks 1, whose operation does not intersect in time, i.e. at any given time in each block, only one of the N like blocks of the same name can work. In this case, all the sub-blocks in blocks 1 are supplied with one common embedded control equipment. Each of the N sub-blocks from the main and backup blocks 1 is assigned a t matching one two-bit configuration control register in switch control block 5, which indicates the working configuration of the duplicated device at a given time.

The device works as follows.

The initial setup signal (supplying a high level to the device input 14) triggers the fault trigger 7 and clears all RCs 25 in the switching control unit 5.

Let the main and reserve blocks 1 be fully functional at the beginning of their work, therefore, the low level signals are output from the outputs 9 and 10 of the built-in control of blocks 1. On the input 12 of the task mode of the device filed O, corresponding to the main mode of the hardware device restructuring. Thus, on the switching control unit 5 through the switch-. Torus 6 signals from outputs 9 and 10 are fed. Input 15 of the subblock code is fed to the address of the currently operating sub block from blocks 1. At block 5, a control signal for output low level switch 3 is output 20 and switch 3 switches to output main unit information 1.

Suppose there is a failure in the first subblock of the main unit 1, then the output 9 of the embedded control produces a high level signal, which through the switch 6 is fed to the switching control unit 5, where the signal changes at its output 20 (high level), i.e. the output switch 3 switches to the backup unit, and with the arrival of a synchronization pulse on the input 13 of the device

information about the failure of the subblock 1 of the main unit is entered into the HANDLE 25.1 (state of the HANDLE 10) and later when working with the first subblocks, the switch is forced from the HANDLE. When the standby unit of the same subblock fails, the RUK 25 also records 1 for the second bit ( RUK 11), and since the RUK 00 and 11 state allows hot-tuning according to the state of the built-in control outputs, in this situation the switch 3 issues information from the main unit 1. If the RUK 01 state (failure in the backup unit), then force the device set up The information is provided on the release of information from the main unit. In case of simultaneous failure in blocks 1, the failure trigger 7 (with the arrival of the synchronization pulse) is activated and the fault information is output to the device output 19, the switching control block 5 outputs a control signal of the low level output switch 3, i.e. the device provides information to the main unit.

Thus, the device is operational until the simultaneous failure in blocks 1.

When a high level signal is input to the device 12, the switch 6 operating modes switches to passing information from the input 1I of the reserve code.

This mode of operation of the device is verifiable, i.e. Imitating the signals of the embedded control node 2 at input 11 and monitoring the information at the outputs 21, 22, 16 and 19, it is possible to check the operation of the main and backup units 1, as well as the correct functioning of the switching control control unit 5 of the output switch 3, the failure trigger 7 and the three-input element And 4. To check (diagnose) the redundant blocks and the device as a whole, the output information of the redundant blocks of which is identical at each moment of time, it is necessary to mark the checked blocks in some way. As such a label, the K + 1-th bit of the output switch 3 is used. Suppose that input codes 11 are in test mode and are given tuning codes to one of the channels 01 or 10, then when the switching equipment of the device is working correctly (block 5

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switching, switch 3) output K + 1-th bit of output switch 3 must be logical O, otherwise - failure in the switching equipment of the device. The conclusion about the correct functioning of blocks 1 is made according to the results of the test control. Otherwise, the operation of the device in the test mode is similar to the work in the main mode.

The switching control unit 5 operates as follows.

, At the initial setup signal, all of the CIA 25s are set to state 00.

Consider the case of failure in the backup unit 1, subblock with address 2 in the mode of hardware adjustment. In this case, the decoder 23 generates a high-level signal to the AND 24.2 element and with the arrival of the synchronization pulse from input 13 enters the input of the ARM 25.2 entry, in which code 01 is written from the inputs 17 and 18 of block 5. Then, through the elements 27.2 and 28.2, respectively, the ARM code enters the elements OR 29 and 30. At the output of the element OR 29 - O, and at the output of the element OR 30 - 1. These signals through the elements NOT 32 and 33 and the elements AND 35 (with inverse output) and 36 pass to the elements AND 31 and OR 34, at the output of which O is generated. Information about the subblock of the main unit 1 is output to the device output. The speaker outputs 21 and 22 of the block 5 failures are given signals O and 1, respectively, indicating a failure in the subblock 2 of the backup block 1 at the current time. The switching control unit 5 works similarly and if one of the N sub-blocks of the main unit 1 fails. If the control panel 25.2 is in the state 00 or 11, then it does not affect the operation of the AND 31 and OR 34 elements, therefore the restructuring is performed from signals from inputs 17 and 18.

Claims (2)

1. A device for controlling the switching of redundant blocks containing the main and backup blocks with built-in control nodes, an output switch and an AND element, the groups of information outputs of the main and backup blocks being connected respectively to the first and second groups of information inputs of the output switch, outputs - which are information outputs of the device, characterized in that, in order to expand the functional capabilities by providing a test mode of operation, a switch p is introduced into it operation presses, the switching control unit and the failure trigger, the installation input in the zero state of which is connected to the input of the initial installation of the device and the installation input of the switching control unit, the first output of which is connected to the control input of the output switch, the synchronization input of the device is connected to the synchronous inputs of the unit switching control and the first input element L, the second and third outputs of the switching control block are indicator outputs of device unit failures, outputs of embedded control nodes the role of the main and backup units of the device is connected to the first information input of the operation mode switch, the outputs of which are connected to the first and second control inputs of the switching control unit, the corresponding inputs of the first and second groups of information inputs of the output switch, and the second and third inputs of the AND element, output which is connected to the installation input to the unit state of the failures trigger, the output of which is the indicator output of the device failure, the input of setting the reserve device code n with the second information input of the operation mode switch, the input of the device operation mode setting is connected to the control input of the operation mode switch, and the input of the code for the executed device node is connected to the same input of the switching control unit. 2. A device according to claim 1, characterized in that the switching control unit comprises a decoder, a three-input element I, first Q 0 5 0 about 5 0 the second and third groups of elements AND, the group of configuration control registers, the first and second multi-input elements OR, the first and second elements AND, the first, second and third elements NOT and the OR element whose output is the first output of the switching control block, the code setting input is executed unit is connected to the input of the decoder, the outputs of which are connected to the first inputs of the first - third groups of elements AND, the second inputs of the first group of elements AND are connected to the synchronous input of the block, and the outputs to the recording inputs of a group of registers configuration, the reset inputs of which are connected to the installation input of the unit, and the outputs of the first and second bits - with the second inputs of the second and third groups of elements AND, respectively, the outputs of elements AND the second and third groups of elements AND are connected to the inputs of the same-name multi-input elements OR, the output of the first multi-input element OR is the second output of the switching control unit, connected to the first input of the second element AND and through the second element NOT to the first input of the first element AND, the inverse output of which is connected It is connected to the first input of the three-input element AND, the output of the second multi-input element OR is the third output of the unit and connected to the second input of the first element AND, and through the third element NOT to the second input of the second element AND whose output is connected to the first input of the element OR , to the second input of which the output of the three-input element I is connected, the first and second inputs of the block are connected to the same-named bits of the information inputs of all configuration control registers, the first control input of the switching control unit It is yuchen to the second input of the three-input element AND, and the second control input of the switching control unit is NOT connected to the third input of the three-input element I. G7- / 9