SU1628190A1 - Pulse generator - Google Patents

Abstract

The invention relates to mimic and digital techniques and can be used in direct generators with a stable frequency w. The aim of the invention is a 4.5 times stability. The generator contains an integrated RS-flip-flop 1, integral comparators 2 and 3 voltage, resistors 4, 5,18, 19, transistors 6 and 7 buffer keys, diode keys 8-9 and 10-11, transistors 13-17 of the outgoing current generator, transistors 20–22 o In the generator, a consistent change in the currents in the circuit and the reference voltage is provided, as well as an increase in the stability of the threshold level. Eliminating the destabilizing factors of the second small size allows for an increase in the temporal stability of more than on the PNH .. 2 Il. J

Description

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The invention relates to a pulsed and digital technique and can be used as a master (clock) generator with a stable repetition rate with

The purpose of the invention is to increase temporal stability.

FIG. 1 shows a pin-pin pulse generator circuit; in fig. 2 - time diagrams of his work: A - time retracting voltage at point 01, B - voltage at point 5; B - currents through diodes of diode keys.

The generator contains an integrated RS-flip-flop 1, whose R- and S-fluxes are connected to the outputs of two integral comparators 2 and 3 of the voltage (PKN). The outputs of the flip-flop 1 are the resistors 4 and 5 connected to the bases of transistors 6 and 7 of the buffer keys. The emitters of transistors 6 and 7 are connected to the potential power supply source + E, and the collectors - to the connection points of the cathodes of diode switches 8-9, 10-11, the anodes of which are connected to the common bus of the generator and to the plates of the time of the master condngator 12, points a and 5 . The outgoing current generator (HBT) includes transistors 13-17, has one reference input on transistor 13 and four outputs, on transistors 14-17, the emitters of GW transistors are connected to a common point and connected to a potential power supply bus + KSGVT is a reflector current The reference current of the GWT is defined by 1 transistor 13 (according to the diode switching circuit) and a resistor 18, which connects the reference input of the GWT to the common bus of the pulse generator. The outputs of the GW, transistors 15 and 16 (their collectors), are connected to the plates of the time of the master capacitor 12, points a and g. The third output of the GWT, the transistor 17, is connected to the connection point of the reference resistor 19 and the inverting inputs TSC 2 and 3. The fourth output of the GWT is connected to the reference input of the flowing current generator (GWT), transistors 20-22, the reference transistor 20 is connected according to a diode circuit. Through it flows supporting

the current equal to the output current of the GWT 1d (transistor 14, GWT) with the emitters of transistors 20-22 are connected together, form a common point and connected to the potential bus of the source of power - E.GWT is also a current reflector, but with a multiplier of 4, which means that the output current GWT generated by transistors 21 and 22, four times the reference (due to the different area of the emitter transitions)

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ABOUT

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Outputs GWT, collectors of transistors 21 and 22 are connected to the connection point of collectors of transistors 6 and 7 of buffer keys and cathodes of diodes 8-9, 10-11 diode keys

The generator works as follows.

Let the RS-trnger 1 be in the transistor 7 state of the key is closed and the capacitor 12 is recharged along the circuit: diodes 10-11 - KOR-capacitor 12 - chantor 15 GW - potential bus + E of the power supply. As a result, the voltage at point Q (left side of the capacitor 12) increases. When it becomes equal to the reference, the voltage across the resistor 19 (point k), the comparator 3 is triggered.

In the case of a voltage across the GOST from the output of the comparator 3, the R-junction RR-tritch er 1 is transferred to the state. At the same time, transistor 7 transcends to the saturation state, and transistor 6 turns off, gts. As a result, the potential of the left end of capacitor 12 (point O, FIG. 1) becomes zero, Јi i equals (point S) - negative. But then (the capacitor 12 starts to recharge on the circuit: diodes 8-9 - capacitor 12 - transistor 16 GW, potential –1 bus of the power supply. The process similar to that described

The reverse switching of the capacitor 12 is carried out with the help of counter-enabled diodes 8-9, 10-11 (included in the balanced circuit), which are controlled by voltage drops generated by buffer keys 6 and 7, which are controlled by the differences coming from the output of the trigger 1,

Due to the introduction of a 3m current, the current flowing through the lower (9, 11) diodes remains constant and is equal to the current flowing through the upper (8, 10) diodes during the reset process and the time of the driving capacitor. Due to the fact that the diode drops 8-9, 10-11 at the moments of the lasting state of the latter are equal in magnitude and opposite in sign. Consequently, the total voltage drop across the diodes 3–9, 10–11, which are in the Enabled state, is equal to zero. The mixing currents Tj I. (Fig. 1) of the lower diodes must be twice as large as the currents of the upper diodes. 8-10 to ensure equality

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(2)

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Equality (2) is maintained automatically during the operation of the pulse generator by coupling the GWT output (transistor 14) to the GWT reference input (transistor 20).

Claims (1)

Thus, such a construction of the generator circuit provides a consistent change in the currents in the circuit and the reference voltage, as well as increasing the stability of the threshold level by directly connecting the time of the driving capacitor to the inputs of the comparators. The elimination of second-order destabilizing factors makes it possible to increase temporal stability by more than an order of magnitude. Invention Formula Pulse generator, RS trigger, voltage comparator, two diode switches made on two pairs of series-connected 35 and counter-connected semiconductor diodes, the time specifying a capacitor, the plates of which are connected to a common generator bus through appropriate diode switches, characterized in that, in order to improve temporal stability, a second voltage comparator is inserted into it, 40 8140 two resistors, the bottom of the current generator tone reflectors, one m of which is an outgoing current generator, the other an inrush current generator, while the common point of the outgoing roVa generator is connected to a potential positive bus five five 0 five 0 The leakage current nec- erator is connected through one of the resistors by a common bus of the pulse generator, the first and second outputs of the current-flowing generator are connected to the corresponding plates of the time of the driving capacitor, the third output is connected to the second of these resistors, the other output of which is connected to the common bus of the pulse generator, the fourth output the generator of the current flowing is connected to the reference input of the generator of the flowing current, the common point of which is connected to the potential bus of the negative power source, and its two outputs, separately connected to the common points of the diodes of the diode switches, the inverting inputs of the comparators are combined and connected to the second resistor, and the non-inverting inputs of the comparators are connected to the corresponding faces of the temporary capacitor, the output of one commulator is :. to the S input, and the output of the other to the R-run of the RS flip-flop, which inverts: the inverting outputs of which through a cut: - the tori are connected to the bases of the corresponding-transistors of the buffer switches, while the emitters of the said transistors are connected to a potential spike positive source of power, and the collector of each of these transistors is connected to the common point of the corresponding diode pairs of diode switches FIG. 2