SU1594612A1 - Method of monitoring shift register - Google Patents

Abstract

The invention relates to computing and microelectronics and can be used in the manufacture of ultra-large integrated circuits with built-in monitoring and diagnostic tools. The purpose of the invention is to increase the speed of the method. The information to be written to the register, previously set to zero, is supplemented at the beginning with two test bits with constant values 01 and after the loading cycle is completed, the state of two test bits is checked. Any combination that differs from the control indicates a register fault.

Description

The invention is based on computing equipment and microelectronics, and can be used in the production of superbore integrated circuits (VLSI) with built-in monitoring and diagnostic tools.

The purpose of the invention is to increase the speed control of the shift register.

The way to control the shift register is as follows.

The information to be written to the shift register, previously set to zero, is supplemented at the beginning with two check bits with constant values 01 and after the loading cycle completes, the state of two check bits is checked. Any combination that differs from the control indicates a register fault.

Consider the examples of loading a 10-bit shift register with various constant faults.

IlycTi) it is necessary to load the sequence of signals Oll001110f into the register, where the first two digits are the control).

There is a malfunction in the register in the form of a stuck1 and in 1 n of the same bit:

01 1001 1 101 О О О 1 О О О О 0.

After three shear cycles:

0110011 - 1 О 1 О 1 1 1 1 О 0. 0. After ten shear cycles:

O 1 1 O 1 1 1 1 P. In the register there is a malfunction in the form of sticking in O p rl - p yes:

011001 1 101 -0000000000

P

Ssd

Three steps of shear;

on 00 D) 101000 about 000

 ten shift cycles

 go 1 1 o o o o (3,

AHaj: orH4Ho it is possible to build a shift register from memory cells with a number of stable states –tl, In this case, the register is loaded: E: the control signals are wired, signals are checked and the state of the cells is checked. ,

The way to control the shift in the v :: register allows the production of the control of the shift register of any length during the input of the working information for

an account of the successive translation of each memory cell into all its possible states. B homeite ending: downloads are full; information about whether the register is good: or not ,.

Formula and 3 about b e e. 1

The method of controlling the shear country, which consists in applying a signal, applying the original signal source to the input of Pa, shifting the sequence

n.p + 1 bit (where n is the bit of the register), m and h and k; and by the fact that, with a view to noBbnucHv :; if the method of operation, the number of signals is chosen to be equal to the number of stable states in a single register row, the control signal is sent to the control signal and the control register: the signal from the logical zero, g; the ontrolt sequence g;;:: cash on p-np pa) rows (rd | ;: v: STAND WIRED STATE of one register), compare p-lu-ch1 register output control with the original, in (; ray : e iicco;:;

they make a sign about a non-enemy; otospss ::; I .register.

Claims (1)

The formula of the invention The method of controlling the shift reg register, which consists in applying a zero signal, applying the initial sequence of signals to the input of the radius, from the last after the second and the next n.n + 1 digit (where n is the digit capacity of the register), it is different from that in, s. In order to increase the speed of the method, the number of control signals is equal to the number of pc? steady states of one row of a register row, serves the remote control of the pilot signals to the input register, with the last: alarm signal from logical zero, super sequence · control sequence from hours to η + w bits (where is the steady state of one register discharge), compare long-term output of the control register with: · -; the garden with the original, but in the case of the hesovgchch, the imperiousness of the inoperable ·. ': -? ·· the regent,