SU1584104A1 - Devitce for phase-lock control with search - Google Patents

Abstract

The invention relates to radio engineering. The purpose of the invention is to improve the noise immunity and the expansion of the frequency range of the search device. The search phase-locked loop includes a phase detector 1, a controlled voltage divider 2, an adder 3, an active low-pass filter 4, a controlled oscillator 5, comparators 6 and 7, a search signal generation unit 8, a key 9, an additional lower filter 10 frequency comparator 11 and search control block 12. In the search mode, the phase locked loop is opened by setting the zero transfer coefficient of divider 2. The search voltage is generated by the integrator at the operational amplifier included in filter 4. When the frequency difference between the signal of the controlled oscillator 5 and the signal at the input to the filter band 10 hits low frequencies, selected less than the PLL loop capture band, the device goes into tracking mode, sets the transmission ratio of the controlled divider 2 to one. 1 il.

Description

The invention relates to radio engineering and can be used in communication technology and radio measurement technology.

The purpose of the invention is improving noise immunity and expanding the frequency range of the search device.

The drawing shows a structural electrical diagram of a device for phase / θ-frequency self-tuning with search.

The device contains a phase detector 1j controlled voltage divider 2, adder 3, active low-pass filter 4, controlled oscillator ed 5, first 6 and second 7 comparators,, search signal generating unit 8, key 9, additional low-pass filter 10, third comparator ' 11 and the search control unit 12, the search signal generating unit 8 20 comprises an RS trigger 13 and a level converter 14, the search control unit 12 contains the first 15, second 16 and third 17 inverters, the first 18 and second 19 25 elements 2I-NOT, RS trigger 20.

The device operates as follows.

At the first moment after switching on, the RS-flip-flop 20, which is included in the search control unit 3Q (Fig. 2), may be in an arbitrary state. If it is in a single state, the phase locked loop is in search mode. In this case, the transfer coefficient of the divider 2 is set equal to zero, i.e. the phase-locked loop is opened, and a linearly varying search voltage is applied to the input of the generator 5. Its formation is carried out by the integrator on the operational amplifier, which is part of the filter 4, to the input of which a constant voltage is supplied through the closed key 9, the level of which determines the speed, and the polarity is the direction of tuning the frequency of the generator 5. The mismatch voltage is formed by comparators 6 and 7, RS-trigger 13 and ed converter 14.,

The signal inputs of the comparators 6 and 7 receive voltage from the filter 4. At their reference inputs, respectively, negative and positive $$ threshold voltages are supplied with a level lower than the saturation voltage level of the operational amplifier of filter 4, which determine the frequency tuning range of the generator 5. While the input voltage is according to the level between the threshold voltage values of bi 7 comparators, at their outputs, such a potential is established, in this case, zero, that the state of the RS-trigger 20 of block 12 is determined logically the level of the comparator 11, which performs the function of a binary quantizer of the beat voltage from the output of the filter 10. If the frequency of the input signal is outside the passband of the filter 10, the voltage amplitude at its output is below the threshold of the comparator 11. When the frequency of the controlled generator approaches the frequency of the input signal, the amplitude the voltage of the beats at the output of the filter 10, increasing, becomes greater than the threshold of the comparator 11, the first pulse from which throws the RS-trigger 20. block 12 to zero oyanie. In this case, the key 9 is opened, disconnecting the mismatch voltage from the input of the filter 4 and connecting to its input through the adder 3 and the divider 2, the transmission coefficient of which is set equal to unity, the voltage from the output of the detector 1. Thus, the phase locked loop is closed and, since the passband of the filter 10 is selected. there is less than the capture band of the PLL ring (for example, twice), the tracking mode is set.

If after turning on the RS-trigger 20 of block 12 is in the zero state, i.e. the search mode is off, but the synchronism mode is not set, then due to the large gain of the operational amplifier of the filter 4, the presence of a bias voltage · bias, as well as the inevitable imbalance of the detector 1, the output voltage of the filter 4 tends to reach the saturation level. Since the thresholds of the comparators 6 'and 7 are selected below the saturation levels, one of them is triggered depending on the polarity of the output voltage of the filter 4. In this case, using the combinational logic circuit of block 12 (inverters 15 and 16, elements 2I-NOT 18 and 19), the RS flip-flop 20 is thrown to a single state, thereby starting the search mode in the desired direction, depending on the triggered comparator,

those. RS trigger status 13.

The proposed phase-locked loop device has increased noise immunity, since the transition to the search mode is carried out only by the signal generated by the device, when the frequency of the generator 5 reaches the tuning range and does not depend on external influences (when the signal-to-noise ratio ensures the normal operation of the PLL) . In addition, the operating frequency range of the search stop control circuit containing the filter 10 and the comparator 11 is not narrower than the operating frequency range of the detector 1 and the generator 5.

Claims (2)

Formulas 1. The device is a three-phase drive car with a search, containing a phase detector connected to the ring, an adder, an active low-pass filter and a controlled generator, the other input of the phase detector being the input of the device, the output of the active low-pass filter connected to the inputs of the first and second comparators, the outputs of which are connected to the inputs of the search signal generating unit, the output of which through a key is connected to another input of the adder, characterized in that, in order to increase the noise immunity and extend the hour of a different range of the search device, it is connected in series with an additional low-pass filter, the input of which is connected to the output of the phase detector, the third comparator and the search control unit, the second and third inputs of which are connected to the outputs of the first and second comparators, respectively, and the output is connected to the control input key, and a controlled voltage divider, and the output of the phase detector is connected to the first input IQ of the adder through a controlled voltage divider, the control input of which is connected to output the search control unit. 2. The device as claimed in claim 1, wherein the search signal generating unit is made in the form of an RS-trigger and a level converter, the R-input of the RS-trigger connected to the output of the first comparator, S-input 20 with the output of the second comparator, output. The RS trigger is connected to the pre- input. the level generator, and the output of the level converter is the output of the search signal generating unit. 25 3. The device according to π. 1, and, moreover, the search control unit is made in the form of three inverters, two elements 2I-NOT and RS-trigger, the output of which is the output 30 of the search control unit, and the inputs of the first, second and third inverters are respectively the second, third and first inputs of the search control unit, the outputs of the first and second inverters are connected to the inputs of the first 2I-NOT element, the output of which through the second 2I-NOT element is connected to S -input of the RS-trigger, and the output of the third inverter is connected to the other 40th input of the second element 2I-NOT and j R-input of the Rs-trigger.