SU1584093A1 - Device for shaping control signals for correction of non-linearity of microwave section - Google Patents

Abstract

The invention relates to radio and can be used in radio relay and satellite communication systems. The aim of the invention is to increase the suppression of out-of-band emission and reduce the delay time. The control signal shaping device for correcting the non-linearity of the microwave path contains delay lines 1 and 7, input encoder 2, recording encoder 3, RAM block 4, memory registers 8, digital-to-analog converters (D / A) 9 and 10, comparator blocks 5, reversible counters 6. The operative memory block 4 for one and the other quadrature contains registers, blocks of elements and elements OR. This goal is achieved by introducing delay lines 1 and 7, D / A converters 9 and 10, comparators, reversible counters 6, registers 8, and their functional links with device blocks. 2 Il.

Description

ate

J

about

WITH

with

The invention relates to radio and can be used in radio relay and satellite communication systems using digital modulation techniques.

The purpose of the invention is to increase the suppression of out-of-band emission and decrease the delay time.

FIG. Figure 1 shows a structural electrical circuit of a device for generating control signals for correcting the non-linearity of the microwave path; in fig. 2 is a structural electrical circuit diagram of a RAM for a single quadrature.

The device contains the first delay line 1, the input coder 2, the write coder 3, the RAM block 4, the first and second comparators blocks 5, the first and second reversible counters 6, the second and third delay lines 7, the first and second memory registers 8, the first and second digital-to-analog converters 9, third and fourth digital-to-analog converters 10. RAM block 4 for one quadrature contains registers 11, blocks of elements AND 12-15, and OR elements 16 (implementation of block 4 of memory for another quadrature is similar to that indicated) .

The device works as follows.

Let us assume that signals are transmitted through a 16-position quadrature amplitude modulation.

Upon arrival at the device input of any combination of characters, encoder 2, which, like coder 3, consists of records from a pair of decoders, is turned into those memory cells of operating memory 4 (registers 11), where the predistorted voltage values are currently stored , determining the coordinates of the signal point on the amplitude-phase plane with quadrature amplitude modulation (CAM), Information from these cells through elements 12-15

and elements OR 16 is read 5

8 memory, and then converted using digital-to-analog converters 9 into a multi-level analog signal. After that, the signals from the outputs of digital-to-analog converters 9 of both quadratures are fed to a modulator (not shown), where the quadrature amplitude modulation with these carrier signals is performed.

l

s

0 5

0

The signal is then amplified and radiated towards the correspondent. A portion of the amplified resultant signal is coupled and demodulated in a demodulator (not shown).

The modulator is fed a reference oscillation from the same generator that is used to feed the carrier to the modulator, which eliminates the need to use a carrier recovery system. The distorted multilevel voltage passing through the non-linear microwave path of each of the quadrature components from the corresponding output of the demodulator is fed to the second inputs of the comparators 5, where it is compared with the true voltage generated by the corresponding digital-analog converter 10 through the input combinations.

Depending on whether the distorted level is more or less than the true level, blocks 5 of the comparators output a logical 1 to the input 1 or -1 of the reversing counter 6, which in this case corrects the information recorded in it by +1 of the least significant bit. On a command from the coder 3 of the record that makes a call to a strictly defined memory cell of the operational memory unit 4, the corrected information is rewritten into this cell. This cycle continues until the required set of signal points is established on the amplitude-phase plane. Delay lines 1 and 7 are needed to compensate for the delay in filters and microwave inertial amplifiers.

The proposed device allows to significantly improve the use of the radio frequency spectrum and the electromagnetic compatibility of systems in which it is used, by suppressing out-of-band radiation caused by the non-linearity of the microwave path, and also reduce the delay time when generating the control signal and significantly increase the efficiency of the microwave amplifier, which allows It significantly reduces energy consumption and reduces the size and cost of equipment.

Claims (1)

Invention Formula Control signal generator to correct non-linear correction 518,840 of the microwave path, containing the input coder, the RAM unit, and the first and second digital-to-analog converters, while the outputs of the input, coder are connected to the address inputs of the RAM unit, which is designed to increase out-of-band emission and reduction of delay time JQ; three delay lines, a recording coder, a third and fourth digital-to-analog converters, a first and a second comparators, a first and a second reversible counter, a first and a second 15 memory registers, an input coder input connected to the input of the first delay line, the output of which is connected to the input of the third and fourth digital-to-analog converters and the input of record coder 20, the output of which is connected to the information input of the main memory unit, the first and second outputs of which are connected respectively 125 6 Cutting the first and second memory registers to the first and second digital-to-analog converters, the output of the third digital-to-analog converter is connected to the first input of the first comparators unit, the output of which is connected to the first installation input of the main memory unit through a reversible counter, the first output of which is connected to the input the second delay line, the output of which is connected to the second input of the first reversible counter, the output of the fourth digital-to-analog converter is connected to the first input of the second block comparative The output of which is connected via a reversible counter to the second installation input of the RAM, the second output of which is connected to the input of the third delay line, the output of which is connected to the second input of the second reversible counter.