SU1569834A1 - Device for checking two pulse sequences - Google Patents

Abstract

The invention relates to computing and can be used in automation and remote control devices for monitoring two pulse sequences. A distinctive feature of the device is that it allows the control of sequences in the presence of interference pulses and in the transmission of monitored pulses. The aim of the invention is to enhance the functionality by providing control over the type of failure. The goal is achieved by introducing an element I6 and two channels 1, each of which contains a control block 16, drivers 17, 18 pulses, elements AND 19, 20, 21, 24, triggers 22, 23, counters 25, 26, and OR element 27. 1 hp f-ly, 3 ill.

Description

one

(21) 4475938 / 24-24

(22) 08.23.88

(46) 07.06.90. Bksh. Number 21

(72) L.N. Melnikov, L.N. Melnikov,

V.G.Kostornichenko and A.V.Margelov

(53) 681.3 (088.8)

(56) USSR Author's Certificate No. 1261097, kp. H 03 K 5/19, 1984.

Author's certificate of the USSR No. 1223232, cl. G 06 F 11/16, 1984.

(54) DEVICE FOR CONTROL OF TWO PULSE SEQUENCES

(57) The invention relates to computing and can be used in automation devices and

telemechanics to control two pulse sequences. A distinctive feature of the device is that it allows the control of sequences in the presence of interference pulses and in the transmission of monitored pulses. The purpose of the invention. is an extension of functionality by providing control over the type of failure. The goal is achieved by introducing an element of AND 6 and two channels 1, each of which contains a control block 16, drivers 17, 18 pulses, elements AND 19, 20, 21, 24 triggers 22, 23, counters 25, 26, and OR element 27. 1 hp f-ly, 3 ill.

with SS

(L

//

sd

05

so as so

four

The invention relates to computing and can be used in automation and telemechanic devices for monitoring two pulse sequences with the presence of interference pulses and gaps of pulse fi

The purpose of the invention is to enhance the functionality by providing control over the type of failure.

FIG. 1 shows a block diagram of the device; FIG. 2 is a functional block diagram of the control unit; FIG. Fig. 3 shows the time diagrams of the device operation.

The device contains channels 1s elements HE 2 and 3, elements AND 4-6, the input of the first monitored sequence, the input 8 of the second monitored sequence, clock 99 input 99 of the initial setup, outputs 11 and 12 of the sign of interference and channels s outputs 13 and 14 a sign of the passage of pulses in controlled channels, the output 15 is a sign of the correct operation of the device.

Each channel 1 contains a control block 16, drivers 17 and 18

pulses, elements And 19-21, triggers 22 and 23, element And 24, counters 25 and 26, element OR 27.

The control unit 16 contains a pulse generator 28, an AND element 29-31, a control mode resolution input 32, an OR element 33, a 34-start trigger input, a 35 5 counting trigger, reversible counters 36 and 37

elements OR 38 and 39, control resolution output 40, account resolution output 41, bar | input 425 clock output 43, input 44 external start.

The time diagrams show plots of the following signals; and - impulses on an entrance 7; b - pulses at the input 8; c and d - pulses at direct outputs of the formers of 17 pulses of the first and second channels, respectively; d and e - pulses at the direct outputs of the flip-flops 22 of the first and second channels, respectively; W and C - pulses at the outputs of the elements And 21, respectively, of the first and second channels; and - the pulses at the output 11; k - pulses at the output 13; l - impuces at exit 12; m - pulses at the exit 14 (fig „3)„

The control unit 16 (Fig. 2) operates as the entire device in turn in two modes: the time interval measurement mode T6x; and control mode.

The trailing period of the input pulses TW-1 / F can vary within T6X in -Tv, Max. In the measurement mode, the accuracy depends on the magnitude of the limit of the TTs D / | IN and the period of clock pulses T0. From the specified relative error of OTU measurement, it is possible to determine the value of the period T0.

Thats

T

 bx min °

(D

The reversible counter module 36 and 37 is determined by the formula

N,. .El ..

(2)

where m is the maximum number of

missed pulses. The pulses from the external trigger input 44 with a duration of tu T0 are fed to the input of the driver 28 pulses from the output pulses with a duration of tu T0 along the leading edge of the input pulses. The first pulse enters through the open element AND 29 and the element OR 33 to the counting input of the trigger 35, which switches over the trailing edge of the pulse to the state opposite to the initial one. In the initial state O of the flip-flop 35, the reset in the O-counter 36 is reset and then the flip-flop 35 switches to 1. The counter 36 starts counting the clock pulses in the add mode. The second pulse switches the trigger 35 to O. At this point, counter 36 counts K, pulses

k - i

K1 T

0

The second interval, Kg, measures the counter 37, operating in the add mode, and the counter 36 operates in the subtraction mode, comparing the intervals T1 and Tj. If K, K2, the pulse from the overflow output of the counter 36 passes through the elements OR 38 to the output 41. The pulse at the discharge output of the counter 36 is formed earlier at At / 2 time than at the overflow output of the counter 36, it is 51698346

blunt to output 40. If T (T, counting) At outputs 40 and 41 of block 16, forchiki 36 and 37 continue to measure and compare the intervals TJ until they reach the equality T, Tj. At the same time, the code of the last remains in one of the counters interval required for control mode.

In the control mode, the unit operates when a zero potential arrives at the input 32. The pulses from the input 44 through the element 29 and do not pass, the block is started by pulses from the input 34. The counter 36 and 37 alternately generate overflow pulses at intervals T equal to T ™ T; Kj-t0. Reset of counters in this mode is prohibited by zero potential from input 32, which closes And 30 and 31 elements.

Consider the operation of the device as a whole. Input pulse sequences with frequencies P (arrive at outputs 13 and 14, and F varies within ЈFM (IH -FMO | KC. Pulse sequences are shifted by DT interval (fig.Z, plots a and b). Individual pulses and groups of pulses in the input sequences can be skipped. In a periodic sequence of pulses mixed in a chaotic stream of interference pulses.

wiring sequences of pulses amt Tm

with periods TF, TF, equal,

T - T

Lcp J - 2 J-cp

elements and

F xsr T .. Impulses from the outputs

, 0)

6 arrive at the inputs of the account

ten

15

25 with module N. (fig.Z, plots g and h). When measuring, there is an AM1 quantization error (c- ± T0, therefore, it is necessary to choose the duration of the strobe pulse D t depending on the module N ,, 0, in order to exclude the possibility of a mismatch of the input pulses with the strobe pulses for the monitoring time.

At 2 "Tn-N

ten

20

When the input pulses hit the gates, the elements and 4 pass them to the reset inputs of counters 26 and the reset inputs to the O flip-flops 23 and set them to O. The pulse formers 18 generate output 25 pulses along the back edges of the strobe pulses, which switch to 1 triggers 23 But the outputs of the And 24 elements are not passed, since the flip-flops 23, like the flip-flops 22, are switched to 1 along the back edges of the pulses. If the input pulses are missing, the outputs of the elements And 4 pulses are missing, the triggers 23 remain in 1 and the output pulses form

In the initial state, the triggers 22, the counters 25 of both channels are reset to the pulses from the input 10 of the reset.

The control blocks 16 of each channel measure the first two intervals.

T, T, T T between the first three pulses of each sequence. At the first outputs of the blocks, pulses are formed. These pulses trigger strobe generators, which form strobe pulses of duration At (figure 4,

EPIGURES OF GAP). IF A ,

pulses from the clock outputs of the control units, formed on the leading edges of the input pulses, fall in the middle of the strobe pulses, pass through the elements AND 4 of each swing and switch to 1 1-K-flip-flops 22 (FIG. 3, plots d and e), in IK, the flip-flops 23. At the same time, the control blocks 16 start operation in the control mode when the blocks 16 are triggered by the input 34 with their output pulses passed through the AND 6 elements (FIG. 3, plots g and 3).

pulse duration

TF, TF, equal,

F xsr T .. Impulses from the outputs

, 0)

6 arrive at the inputs of the account

25 with module N. (fig.Z, plots g and h). When measuring, there is an AM1 quantization error (c- ± T0, therefore, it is necessary to choose the duration of the strobe pulse D t depending on the module N ,, 0, in order to exclude the possibility of a mismatch of the input pulses with the strobe pulses for the monitoring time.

At 2 "Tn-N

ten

When the input pulses hit the gates, the elements and 4 pass them to the reset inputs of counters 26 and the reset inputs to the O flip-flops 23 and set them to O. The pulse formers 18 generate output pulses on the back edges of the strobe pulses, which switch to 1 flip-flops 23, but the outputs of the And 24 elements are not passed, since the flip-flops 23, like the flip-flops 22, are switched to 1 along the back edges of the pulses. If the input pulses are missing, the outputs of the elements And 4 pulses are missing, the triggers 23 remain in 1 and the output pulses form

The telephones 18 are passed by elements AND 24, respectively, to outputs 13 and 14 (Fig. 3, plots k and m), evidence of gaps in the output pulses.

The output pulses of both sequences that do not fall into the gates are considered interference pulses. They are distinguished by the elements And 5, respectively, are fed to the exits 11 and 12 (Fig. 3, diagrams and, l).

Counters 25 count N10 pulses from the outputs of the And 6 elements and the output pulses to set the O triggers 22, switching the blocks 16 to the measurement mode. Periodic operation of the blocks 16 in the measurement mode is necessary to monitor the change in the value of the period Tx.

Counters 26 count the number of missed additional pulses. Their moduli are N) (chosen to be equal to m + 1, therefore, if no additional (m + 1) input pulses arrive, it is considered that the value of period T has changed

ex

In these

In the case of overflow pulses, the counters 26 switch the blocks 16 to operation in the measuring mode,

Element 6 is necessary to control the operation of the device, which during normal operation outputs 15 pulses with a frequency equal to the frequency of switching the control units 16 to the measurement mode. The absence of pulses at output 15 indicates a device failure.

The elements And 4 and 5 and the elements NOT 2 and 3 with partial coincidence of the pulses from the inputs 7 and 8 form at their outputs mismatched pulses arriving at the inputs of the blocks 16.

Claims (1)

Formula invented and . „ 1 "A device for monitoring two pulse sequences, containing two elements AND and two elements IV, the first input of the first element AND connected to the input of the first element NOT and is the input of the first controlled sequence of the device; the third input of the second element AND is connected to the input of the second element NOT and is the input of the second controlled sequence of the device, the output of the first element is NOT connected to the second input of the second element AND, the output of the second element is NOT to the second input of the first element AND, different In order to extend the functionality by providing a definition of the type of failure, two channels and a third AND element are introduced into the BO, and the output of the first AND element is connected to the external trigger input of the first channel, the output of the second element And to the external input start the second channel, the output of the sign of correct operation of the first channel is connected to the first input of the third element I9; the second input of which is connected to the output of the sign of the correct operation of the second channel, the output of the third element I is the output sign and the correct operation of the device, the clock inputs of the first and second channels are connected to the clock input of the device, the inputs of the initial installation of the first and second channels - with the input of the initial installation of the device; each channel contains a control block, two pulse drivers . ,, 0 50 five 0 Four I elements, two triggers, two counters and an OR element, in each channel, a clock input and an external trigger input for the control unit are connected to the channel inputs of the same name, the control enable output of the control unit is connected to the input of the first pulse shaper, the inverse output of which is connected to the first the input of the first element And, the second input of which is connected to the first input of the second element And and the clock output of the control unit, the output of the first element And is the output of the sign of the disturbance of the monitored channel sequence Ala, the first input of the OR element is the input of the initial setup of the channel, the overflow output of the first counter is connected to the second input of the OR element, the third input of which is connected to the overflow output of the second counter, the output of the resolution of the control block is not connected to the first input of the third element AND whose second input is connected to the direct output of the first trigger, to the first input of the fourth element I, to the third input of the first element I, and is the output of a sign that the channel is working properly the counting input of the second counter and the input of the internal start of the control unit; the inverse output of the first trigger is connected to the control enable input of the control unit; the output of the second element I is connected to the reset inputs of O, the first counter and the second trigger, with the sync input and the J input of the first trigger, The K-input of which is connected to the K-input of the second trigger and to the zero potential bus of the device, the direct output of the first pulse shaper is connected to the second input of the second element I and to the input of the second pulse shaper, o D which is connected to the synchronous input and J-input of the second trigger and to the second input of the fourth element I, the third input of which is connected to the direct output of the second trigger, the output of the fourth element I is connected to the counting input of the first counter and the output signal of the controlled sequence of the channel . 2, the device according to claim 1, characterized in that the control unit comprises a pulse shaper, three AND elements, three OR elements, a counting trigger, two reversible counters, the counting input of the first reversible counter being connected to the counting input of the second reversing counter and connected to the clock input of the block, the input of the pulse generator is the input of the external start of the control unit, the output of the pulse generator is connected to the first inputs of the first, second and third elements And is the output of the block, the second input of the first element AND is connected to the second inputs of the second and third elements AND, and it is the resolution input of the control mode of the block, the output of the first element AND is connected to the first input of the first element OR, the second input of which is the input of the internal start of the block, the output of the first, element OR is connected with a counting input of a counting trigger, the direct output of which is connected to the control input of the reverse of the first reversible counter and the third input of the third element I, the output of which is connected to the reset input in O of the second reversible counter, The full output of the counting trigger is connected to the third input of the second element I and to the control input of the reverse of the second reversible counter, the output of the second element AND is connected to the reset input O of the first. reversible counter, the bit output of the first reversible counter is connected to the first input of the second element OR, the second the input of which is connected to the bit output of the second reversible counter, the overflow output of which is connected to the first input of the third OR element, the second input of which is connected to the overflow output of the first p The eversive counter, the output of the second element OR is the output of the control resolution of the block, the output of the third element OR is the output of the resolution of the account of the block. FIG. 2 kU G-i r. Editor L.Zaytseva Compiled by E. Toropov Tehred M. Didyk Proofreader V. Kabatsy Order 1450 Circulation 570 VNIIPI State Committee for Inventions and Discoveries at the State Committee on Science and Technology of the USSR 113035, Moscow, Zh-35, Raushsk nab. 4/5 Fi.Z Subscription