SU1307565A1 - Device for checking ime intervals between pulses - Google Patents

Abstract

The invention relates to a pulse technique and can be used in measuring instruments and frequency analyzers for tracking frequency. 1st. The purpose of the invention is to expand the functionality of the device. In order to achieve this goal, an AND 5 element, a formers 7, 8 impulses, an OR 10 element, a 9 imiuls counter, a decimator 11, and a register 12 are entered into the device. The device also contains a 1 clock clock pulse, a pulse 2 counter, and a dentifier 3 , element OR 4, informational 1, 6, output 13. The device allows to control the direction and deviation of the measured time interval when it goes beyond the limits of the set codes, which can be set over the entire time interval. 1 il. co o ate og) sd

Description

The invention relates to a pulse technique and can be used in measuring instruments and signaling devices of the pulse frequency.

The aim of the invention is to expand the functionality of the device by providing control of the direction and amount of deviation of the measured time interval when it exceeds the permissible limits with the help of specified set codes in the entire range of time intervals.

The drawing shows a block diagram of a device for monitoring the time intervals between pulses.

The device for controlling the time intervals between pulses contains a generator of 1 clock pulses, the first counter of 2 pulses, the outputs of which are connected to the inputs of the first decoder 3, the first element OR 4, the first input of which is connected to the last output of the decoder 3 and the inverse input of the And 5 element connected a direct input to the output of the generator 1, and an output to the counting input of the counter 2. The information bus 6 of the device is connected to the input of the first pulse shaper 7, the output of which is connected to the second input of the OR 4 element and the input of the second imaging unit 8 pulses connected by an output to the reset inputs of the first and second counters 2 and 9 pulses. The outputs of the decoder 3 are connected to the inputs of the second element OR 10, the output of which is connected to the counting input of the counter 9 connected by the outputs to the inputs of the second decoder 11. The information inputs of the register 12 are connected to the outputs of the decoder 11, the clock input - to the output of the element OR 4, and the outputs the outputs of the device 13.

Counters 2 and 9 are asynchronous frequency dividers. The formers 7 and 8 are designed to form short pulses, respectively, on the leading edge of the input pulses and on the falling edge of the output pulses of the imager.

The decoder 3 decrypts the states of counter 2, which correspond to the setting codes defining those points in time with which it is necessary to compare the time intervals between the pulses of the monitored frequency. For example, if you need to have signals at the outputs of the decoder 3 at times Ii, t2, ..., t, -, from the beginning of the next input pulse, you must set the setting codes, respectively, Ni, N2, ..., N /, equal to Ni

.IL ..M, iz

ii

i-; N2 -t -, ..., N, where TO is the period

following pulse generator 1 clock pulses.

five

The device works as follows.

On the information bus 6 device

impulses arrive, time intervals

between which controls the device.

The next impulse comes from the bus 6 to the driver 7, which forms at its output a short pulse coming through the element OR 4 to the clock input of the register 12. If at this time counter 9 is in any i-th state,

then on the output (1 + 1) -th bus of the decoder 11 there is a signal "1, which is entered on the clock pulse into the register 12, the output" A "() of which appears the signal" 1.

The former 8 generates a short pulse along the falling edge of the output pulse of the former 7, which sets the counters 2 and 9 to the zero state. From this moment begins the control of the next temporary1 about the interval between

0 input pulses.

The pulses from the generator through the element And 5 are fed to the input of the counter 2, fill it. When the state of counter 2 coincides with the first setpoint code, the first active output of decoder 3 appears

 the signal which, through the element OR 10, enters the counting input of counter 9, records a unit into it and thereby fixes the fact that the measured interval is longer than the interval between the input pulse packet and the first setpoint code.

The active outputs of the decoder 3 are outputs on which setpoint codes are set, unlike passive, not activated outputs. The total number of outputs in de 5 encoder 3 is equal to, where K is the number of bits of counter 2, determined by the longest time interval in which the settings must be made, the number of which determines the number of active outputs of the decoder.

0 When the state of counter 2 coincides with the second code-set of the decoder 3, a signal appears at the second active output of the last, which through the element OR 10 sets the counter 9 to the state "2, which decrypts the decoder 11. Of the measured interval, more than the sum of the intervals limited by the beginning of the input pulse and the second setpoint code. Counter 2 continues to count pulses from generator 1.

Q When the next input pulse arrives, the driver 7 generates a pulse that, through the OR 4 element, arrives at the clock input of register 12, records the signal “1 from the third output of the decoder 11.” From the output of the register 12, the signal goes to output 13 of the device, signaling The fact that the end of the measurement of the interval between two adjacent pulses is within the interval.

limited by the second and third setting codes (in this example, three settings are set in the decoder 3).

The former 8 generates a short pulse along the falling edge of the output pulse of the former 7, which sets the counters 2 and 9 to the zero state. The monitoring of the next time interval between the input pulses begins. Further, the device operates similarly to that described in the measurement of the previous time interval until the moment when the state of the counter 2 is compared with the second code-set of the decoder 3.

Due to the absence of the next input pulse, counter 2 continues to accumulate pulses from generator 1 until its state coincides with the third code — the setpoint of the decoder 3; as a result, a signal appears at the third active output of the latter, which sets the counter 9 to state 3 decrypts the decoder 11.

In the absence of input pulses, the counter 2, accumulating pulses from generator 1, is set to the state "11 ... 1, while on the last bus of the power distributor 3 a signal appears" 1 that prohibits further passage through the element 5 of the pulses from oscillator 1 to counter 2. In addition, the signal from the last bus de-HJ printer 3 goes through the element OR 10 to counter 9, sets it to the “4” state, which leads to the appearance on the fifth output bus of the decoder 1 signal, and through the element OR 4 on the clock input of the register 12, writing in it sig al outputted from the decoder 11. As a result, the output of the fifth register 12 is the signal supplied to the output 13 and signal that the end of the measured interval is within the range, the beginning of which is determined by the capacitance meter 2.

A state of the device in which the pulses from the generator 1 do not arrive at

Counter 2, set to state "1 1 ... 1, and on the last bus of depilator 3, the signal" 1 is stored until the next input pulse arrives, after which the impulse from driver 7 arriving at the clock input of register 12 is confirmed by state - the presence of a signal at the fifth output, and the pulse from the imaging unit 8 counters 2 and 9 are set to "O", after which the monitoring of the next time interval begins.

Claims (1)

Invention Formula A device for monitoring the time intervals between pulses, comprising a clock pulse generator, a first pulse counter, the outputs of which are connected to the inputs of the first decipher, the first OR element, characterized in that, in order to expand the functionality of the device, an AND element is introduced into it, and the second pulse formers, the second OR element, the second pulse counter, the second decoder, the register, the clock input of which is connected to the output of the first OR element, the first input of which is connected to the last at the output of the first decoder and the inverted input of the element I, the direct input of which is connected to the output of the clock and pulse generator, and the output connected to the counting input of the first pulse counter, the device data bus is connected to the input of the first pulse shaper, the output of which is connected to the second input of the first the OR element and the input of the second pulse generator, the output of which is connected to the reset inputs of the first and second pulse counters, the outputs of the first dentorator are connected to the inputs of the second OR element, and the output which is connected to the counting input of the second pulse counter whose outputs are connected to the inputs of the second decoder, the outputs of which are connected to the information inputs of the register.