SU1564722A1 - Multistable voltage kmos-comparator - Google Patents

Abstract

The invention relates to a pulse technique and can be used in parallel and in parallel-series A / D converters, as well as in various control and measurement units for determining the voltage level. The aim of the invention is to enhance the functionality of the comparator by converting its input voltage to an output positional unit code and reducing the current consumption. Connecting the combined sources of the output N-channel MOS transistors 6 to the power bus through a resistor 7 provides a clear switching of the multi-stable CMOS voltage comparator from one stable state to another by switching P-channel 1 and additional P-channel transistors 2. CMOS- the comparator contains the input source 8, the load resistors 5, the current generator on the transistor 9 and the resistor 10, the reference current generator on the transistor 11 and the resistor 12 and the parametric stabilizer, made on the stabilizer no 13 and resistor 14. 1 yl.

Description

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The invention is an extension of the functionality of a compara mount by converting its input voltage to an output position unit code and reducing the current consumption. Connecting the combined sources of the output p-channel MOS transistors to the power supply bus through resistor 7 ensures a clear switching of the multistable CMOS voltage comparator from one stable coax

The invention relates to a pulse technique and can be used in parallel and in parallel-series, as well as in various control and measuring units dp for determining the voltage level.

The aim of the invention is to extend the functionality of the comparator by converting its similar voltage directly into a positional unit code and reducing the consumed current,

The drawing shows a schematic diagram of a multistable MOS voltage comparator.

Multistable "MOS voltage comparator contains M connected in series 1-1,. ,,., 1-М and М additionally introduced 2-1 ,,,, 2-М p-channel transistors, two chains 3-1, .. .3- (М-) and 4-1 ,, .., 4- (МI) series-connected resistors, М + 1 load resistors 5-19 ..., 5 (М + 1), М + 1 п- channel transistors 6-1, „.. 6- (M + 1), resistor 7, input source 8, transistor 9 and current supply resistor 10, forming a reference current generator. the transistor 11 and the current-setting resistor 12, the current generator, the zener diode 13 and the oisistor 14, which form the parametric stabilizer, while the gates of the transistors .. 1-M are connected to the connection points of the series of series-connected resistors 3-1, ..., 3 (M- 1), and the gates of transistors 2-1, „.., 2-М - to the connected terminals of the resistors of the chain

series-connected resistors 4-1 ,, .., 4- (M-1), the sources of transistors 2-1, ..., 2-M are pairwise connected to the sources of transistors 1-1,.,., 1-M, and their

This is not possible by switching p-channel 1 and additional p-channel 2 transistors. The CMOS comparator contains an input signal source 8, load resistors 5, a current generator on transistor 9 and resistor 10, a reference current generator on transistor 11 and resistor 12, and a parametric stabilizer made on zener diode 13 and resistor 14. 1 Il.

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The drains along with the drain of the 1H transistor are connected to the negative power bus -En via load resistors 5 (M-I), to which the gates of p-channel transistors 6-1, .. „, 6- (M + 1) are also connected, the drains of transistors 6-1, ..., 6- (M + 1) are the outputs of the multistable comparator, and their sources are connected and connected to the power supply bus -En through a resistor 7, a chain of resistors 4-1, ..., 4- (M +1) is connected between the power buses, and a chain of resistors, ..., 3 (M-1) between the input voltage source 8 and the reference current generator on the transistor 9 and the current supply resistor 10 , the sources of the last pair of p-channel transistors 1-M and 2-M are connected to a positive power supply bus + UF via a second current generator on transistor 11 and a current supply resistor 12, and the gates of the current generator transistors are connected to the output of a parametric voltage regulator at the series-connected zener diodes 13 and 1 h resistor

The multistable CMOS voltage comparator operates as follows.

The voltage drops across the resistors, .. 3- () of the first chain from the flow of the current of the reference generator top on the transistor E and resistor 10 are set by the value of the voltage applied by the resistors 4-1, h, (M + 1) of the second chain. When the input voltage U gx 0 is applied, the voltages of the input transistors are supplied with lower voltages than the voltage across the gate of the reference transistors 2- $ .0, 2-M, therefore all transistors 2-1, ... , 2-M

locked, and the transistors 1-1, ..., 1-M are open. The current 1G of the generator on the transistor 11 and the resistor 12, flowed through the open transistors 1-M, 1-1 and the resistor, creates a voltage drop, unlocking the output transistor 6-1. At the zero output of the comparator, a current appears, the magnitude of which is determined by the current 1G and

resistors resistors and 7. All other transistors 6-2,.,., 6-M are locked.

With an increase in the input voltage, the potentials at the gates of all the transistors 1-1 ,, .., 1-M simultaneously increase by the same amount, since the voltage drops across the resistors, 3, (M-1) from the flow of stabilization 156

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remain constant.

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When Uex exceeds the threshold value U then, given on the gate of transistor 2-1, the input transistor is disabled and the 2-G reference transistor is heated. Current 1G will begin to flow through the transistor 2-1 and the resistor 5-2. This leads to the appearance of current already at the first output of the comparator, the rest of the comparator output transistors will be locked and there will be no currents at the other outputs.

When the input voltage UBx increases by the magnitude of the lipor, the voltage across the gate of the input transistor 1-2 will become larger than the threshold voltage U then r Unup, + 4Unop on the gate of the transistor 2-1. Transistor 2-2 opens and prohibits transistor 1-2. The signal will disappear from the first output of the comparator and through the second. The comparator will go into a new state.

When the input voltage rises by an additional amount of UV voltage, the comparator changes its state again: the signal is on its third output, and so on.

Thus, when the input voltage changes, the position of the output signal changes, i.e. The input voltage in the proposed comparator is converted directly to a positional unit code. The magnitude of the supply current of the comparator determines

with generator currents

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divider h-1, ..., 4- (M41) and does not depend on the magnitude of the input voltage. This current may be several times smaller than the supply current of a known

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a multi-threshold CMOI current comparator, determined by the sum of parallel-connected reference generators. The stability of the supply current of the proposed comparator also ensures the stability of the thermal mode, which has a positive effect on the stability of the thresholds of the comparator triggering.

Connecting the combined sources of the output n-channel MOS transistors to the power bus through a resistor 7 ensures reliable and precise switching of the proposed comparator from one stable state to another due to the feedback action. The proposed comparator is less sensitive to the variation of parameters of transistors than the prototype. Its tripping thresholds are determined by the resistances of the resistors and the stability of the current I,

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Claims (1)

25 claims thirty 35 db A multistable CMOS voltage comparator containing M + 1 n-channel MOS transistors, the drains of which are outputs and the sources are combined, the input source, M series-connected p-channel MOS transistors, the last of which is the source connected to a positive power supply bus through a current generator on a transistor and a current-setting resistor, and a reference current generator, characterized in that, in order to extend the functionality by converting the input voltage of the comparator into a positional unit voltage At the output and reduction of the consumed current, M p-channel transistors, M + 1 load resistors, a parametric voltage regulator on the Zener diode and a resistor, the first from M-1 and the second from the M + 1 chain are added to the multi-stable CMOS comparator. connected resistors, the connected terminals of which are connected respectively to the gates of series-connected and additionally introduced p-channel MOS transistors with pairwise connected sources, the drains of the latter and the drain of the first transistor atelnoy chain connected to the negative supply rail through a load rezis45 50 55 7 tori and to the gates of the output n-channel-current, the gate of the transistor MOS transistors, combined with the gate of the transistor, whose generators are connected to a series current The power supply bus through a resistor, 5 transistors are connected to the output. In this case, the first resistor of the metric stabilizer is connected between the input source and the second resistor circuit. voltage and the generator is switched on between power lines.