SU1564661A1 - Device for reading graphic information - Google Patents

Abstract

The invention relates to automation and computing and can be used to enter graphic information into a computer. The aim of the invention is to improve the noise immunity of the device in the event of a single impulse noise. The device contains a tablet with orthogonal positioned coordinate tires in the form of single conductors. The sinusoidal signal emitted by the coil of the puller of coordinates is alternately received by coordinate buses. The position of the center of the puller of coordinates is determined by the block for determining the coordinates by adding coarse and accurate readings for each coordinate. A coarse reading is determined by a change in the phase of the signal induced in adjacent coordinate buses. The phase change of the signal is detected by the comparison unit. In determining the accuracy of the reference, the device implements a linear regression equation for two average amplitudes. The coordinate determination unit contains a multiplexer, a random access memory, a multiplier, a comparison circuit, a divider, an additional code generator, a switch, a reversible bus address counter, a fixed memory, an adder, and a distributor. The device improves noise immunity by discarding the largest and smallest amplitudes of the read signal from the coordinate bus and averaging the modules of the amplitudes of the samples taken from each coordinate bus. 2 hp ff, 6 ill.

Description

f

(21) 4316422 / 24-24

(22) 10/12/87

(46) 05/15/90. Bul L 18

(71) Kazakh Experimental Plant of Geophysical Instruments Kazgeofizpribor

(72) V.Vaiser, V.M. Zuev, V.A.Kashishin, V.A. Krasyukov, V.T.Kurtochkin

and E.V.Tishina

. (53) 681.327.12 (088.8)

(56) UK application No. 2093299, cl. G 06 K 11/06, 1982.

For Britain, UK K-2080539, cl. G 08 C 21/00, 1982.

(54) DEVICE FOR READING GRAPHIC INFORMATION

(57) The invention relates to automation and computing and can be used to enter graphic information into a computer. The aim of the invention is to improve the noise immunity of the device in the event of a single impulse noise. The device contains a tablet with orthogonal positioned coordinate tires in the form of single conductors.

The sinusoidal radiation emitted by the coil of the coordinate surveyor with ignal is taken alternately by the coordinate tires. The position of the center of the puller of coordinates is determined by the block for determining the coordinates by adding coarse and accurate readings for each coordinate. A coarse reading is determined by a change in the phase of the signal induced in adjacent coordinate buses. The phase change of the signal is detected by the comparison unit. In the process of determination. A precise reference device implements a linear regression equation for two averaged amplitudes. The coordinate determination unit contains a multiplexer, a random access memory, a multiplier, a comparison circuit, a divider, an additional code generator, a switch, a reversible bus address counter, a fixed memory, an adder, and a distributor. The device allows to increase the noise immunity by discarding the largest and smallest amplitudes of the read signal from the coordinate bus and averaging the amplitude moduli of about 1 counts taken from each coordinate of the tire. 2 hp f-ly, 6 ill .-

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The invention relates to the field of automation and computer technology, namely, devices for reading graphic information, and can be used to enter graphic information into a computer.

The aim of the invention is to improve the noise immunity of the device.

FIG. 1 shows a block diagram of the device; in fig. 2 is a block diagram of the coordinate determination unit; in fig. 3 is a block diagram of a comparison block; in fig. 4 is a diagram explaining the effect of a single impulse noise on the amplitude of the reference (modulus of a number); in fig. 5 - epures

voltages at characteristic points in the device circuit; in fig. 6 - the algorithm of the distributor.

The device (Fig. 1) contains a plate 1 with systems of mutually orthogonal coordinate lines 2, made in the form of single conductors X4,

HYH „and U, U4, ..., UE, laid

In constant increments along the axes X and Y, Some ends of the coordinate buses are connected to the common bus of the device, and others are connected to the corresponding information inputs of switch 3, bus X and switch 4, bus U. The exciter coil 5 coordinates is connected to the output of amplifier 6, input which is connected to the output of a sinusoidal signal generator signal 7. The information outputs of the switches 3 and 4 are connected to the input of a serial chain consisting of amplifier 8, band pass filter 9, analog memory block 10, low pass filter 11, ADC 12, the gate input of block 10 and control input of ADC 12 are connected respectively to the output of the gating and the control input of the generator 7. The outputs of the module of the number and the sign of the number of ADC 12 are connected respectively to the information inputs (inputs of the module of the number and sign of the number) 13 and 14 of the comparator unit 15, the control input 16 of which is connected to the control output house generator 7. The outputs of modulators 17 and 18 shift plate 19 sync comparing unit 15 are respectively connected to an input of modulator 20, input 21 of shift plate 22 and the input of the synchronization unit 23 for determining the coordinates. The output 24 of the number of the coordinate bus of the block 23 is connected to the address inputs of the switches 3 and 4. The information output 25 of the block 23 is connected to the communication line of the microcomputer 26, the Input 20 of the number module and the output 24 of the number of the coordinate bus of the block 23 are connected respectively to the first and second information inputs of the multiplexer 27 (FIG. 2), to the third information input of which the output of the permanent memory 28 is connected. The fourth and seventh information inputs of the multiplexer 27 are connected respectively to the output of the adder 29, divider 30, information output of the circuit 31 comparisons and output multiply

five

0

five

0

five

0

five

0

five

phone 32. The output of the multiplexer 27 is connected to the information input of the RAM 33, the output of which is connected to the information inputs of the divider 30, the comparison circuit 31, the multiplier 32 and the code generator 34, the input and output of which are connected respectively to the first and second information inputs of the switch 35, the output of which is connected to the information input of the adder 29. The control output of the comparison circuit 31 is connected to the n-first input of the distributor 36, the second input of which, which is the input 21 of the sign change of the coordinate determination unit 23, connects Not with the change of the 18th sign of the block 15 of the comparison. The first and second outputs of the distributor 36 are connected respectively to the clock input and the control input of the counting direction of the bus address counter 37, the output of which is connected to the output of the coordinate bus number 24 of block 23, and from the third to the ten outputs of the distributor 36 are connected respectively to the control inputs of the adder 29 switch 35, driver 34 (additional) code, divider 30, comparison circuit 31, multiplier 32, RAM 33 and multiplexer 27.

The comparison unit 15 (FIG. 3) contains a comparator 38, the first input of which is connected to the input 13 of the module of the number of block 15 and through the key 39 connected to the output of the number 17 of the block 15 of the comparison. The second input of the comparator 38 is connected to the output of the fixed memory 40. The input 14 of the sign of the number of the block 15 is connected to the D-inputs of the first 41 and second 42 D-flip-flops, the direct outputs of which are connected to the output 18 of the change of the sign of the block 15 through the element EXCLUSIVE OR 43 The synchronization inputs of the first 41 and second 42 D-flip-flops are connected respectively to the direct and inverse outputs of the counting flip-flop 44, the input of the imaging unit 45 is connected to the control input 16 of block 15, the set-up inputs to zero of the trigger 41, 42 and 44 are connected to the output of comparator 38 and with control input key 39, and the output of the imaging unit 45 is connected to the clock input of the counting trigger 44 and the output 19 of the synchronization unit 15.

A device for reading graphic information operates as follows.

The sinusoidal signal emitted by the puller coil 5 coordinates is alternately received by the coordinate cables XA, Xi}. , HP, U, UЈ, ..., UE. Polo-

The position of the center of the puller of coordinates is determined by block 23 by adding coarse and accurate readings for each coordinate. The coarse reading is determined by changing the phase of the signal induced in adjacent coordinate tires j and j + 1, and then multiplying the number of the coordinate tire j by the distance between the tires. The phase change of the signal is detected by comparison unit 15. When determining the exact reference A, the device implements a linear regression equation for two averaged amplitudes Aj and Al:

. n r Aj + i + Aj, 5-)

 VAjt, Aj

The averaged amplitudes Aj and Ajf1 are determined by discarding the maximum and minimum amplitude modules and averaging the remaining amplitude modules in a series of P counts taken from the same j-bus or j +1:

1 rm1 pu

A, - e. D. 1-A A, G p-2 & V P-2 Ј4A .J + r

As can be seen from FIG. 4, in a series of 10 samples (R.Y.) taken from the jth coordinate bus, under the influence of a single impulse noise (Fig. 4a), the 5 (largest) and 6 (the smallest) amplitude modules of samples A are distorted ;; (Fig. 46), which, when sorted in ascending order, move respectively to the 10th and 1th positions (Fig. 4c) and then are discarded when determining the average reading:

j 1 AG 8 | gACHG

The number P is chosen mainly in

limits of 5-20.

I

After the puller 5 is installed at the desired point of the tablet 1 (Fig. 1), the operator presses the Start button (not shown), as a result of which all the cells in the RAM 33 (Fig. 2) are zeroed, the reversible counter 37 of the bus addresses and reset to zero triggers 41, 42 and 44 (fig. 3). The outputs of block 15 are set to zero signals. From the output of the counter 37 zero,

6616

the second address goes to the second input of the multiplexer 27 and through the output 24 of the number of the coordinate bus of the unit 23 to the address inputs of the switches 3 and 4 buses X and U. The switch 3 buses X connects the input of amplifier 8 to the bus

X, (Fig. 5a). Coming in from the exit

sine wave signal generator 7

A sinusoidal signal with a frequency of predominantly 200-400 kHz is amplified by an amplifier 6 (Fig. 56), which vibrates the puller coil 5. The magnitude of the induced in the coordinate tires

The X and Y signal depends on the puller 5 distance from them. The signal amplified by the amplifier 8, induced in the coordinate bus, is passed through a band-pass filter 9, often centrally

the bandwidth of which is set equal to the frequency of the signal emitted by the puller 5. The signal filtered by the band-pass filter 9 (Fig. 5g) goes on to the information

the input of block 10 of analog memory, to the input of which gating from the output of the gating signal of generator 7 enters a series of five strobe pulses synchronized in time with the apex of the positive half-wave of the output voltage of amplifier 6 (, V 5c). The output signal of the block 10 in the form of a DC voltage shelf (Fig. 5e) is filtered from switching emissions and high-frequency noise by the low-pass filter 11 (Fig. 5e) and is fed to the information input of the A / D converter 12, to the control input of which from the generator control output 7, a pulse with a duration of about one and a half periods of strobe pulses is applied, permitting the digitization of signals (Fig. 5g), with the leading edge of the pulse Ј coinciding with

The fourth strobe-pulse series. The modulus of the number corresponding to the amplitude of the signal induced in the corresponding coordinate bus is set at the output of the ADC number 12 module until the end of the control pulse, and the sign of the number indicates the number of the signal that goes to the corresponding inputs 13 and 14 of the block 15. Block synchronization 15

With the process of analog-digital conversion, the formation is carried out by applying to the control input 16 of the unit 15 the same pulse from the control output of the generator 7 as to the control

ADC input 12 (Fig. 5g) „A synchronization pulse is generated at the falling edge of this pulse by the shaper 45 (Fig. 3, Fig. 5h), which arrives at the clock input of the counting trigger 44 and at the output 19 of the 15 V block of the 15 block (Fig. 3 ) analysis of the digitized signal by module and sign. When the module of the number, coming through the input 13 of the block 15 to the first input of the comparator 38, is less than the predetermined noise threshold, coming in the form of a digital code from the output of the permanent memory 40 to the second input of the composer 38, the triggers 41, 42 and 44 are held in the zero state 1, coming from the output of the comparator 38. With the same signal from the output of the comparator 38, the key 39 is held in the open state. The output of the module of the number 17 of the block 15 is present O. About from the direct outputs

D-flip-flops 41 and 42 arrive at the inputs of the EXCLUSIVE OR 43 element and at its output, which is the output J8 of the sign change of block 15, is Q. Zero values from the outputs 17 and 18 of block 15 arrive at inputs 20 and 21 of block 23, which the arrival of a sync pulse from sync output 19 of block 15 to sync input 22 of block 23 via output 24 of the coordinate bus number resolves polling of the next coordinate tire X by adding one to counter 37 (Fig. 5a).

The described process of polling the X coordinate buses continues until the modulus of the number on the first input of the compiler 38 exceeds the code value of the noise threshold at its second input, its output is O, allowing the switching of all triggers of the block 15, while the key 39 closes and the number module passes to the output of the module of the block number 15. At the output 18 of the sign change of the block 15, the zero level will be held. As the surveyed, coordinate tires approach the coordinate remover, the value of the signal induced in them will increase (Fig. 5d).

Each time the analog-to-digital conversion process starts, the generator 7 delivers a corresponding pulse of duration to the control input of the A / D converter 12 and the control input 16 of unit 15. At the moment this is completed

five

five

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0

five

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the pulse shaper 45 generates a clock pulse, which is fed to the clock input of the counting trigger 44 and the output 19 of the synchronization of block 15. When the comparator 38 allows the triggers to work, the counting trigger 44 year is shifted by the clock pulse from the output of the shaper 45 Mio or inverse output, writes O or 1, coming from the input 14 of the sign of the number 15 in the corresponding D-flip-flop. As long as the sign of the number does not change, the same binary number, zero or one, is written in both D-triggers 41 and 42, and the output of element 43 of the CCM is O. As soon as the phase of the signal read by the coordinate buses is changed that on bus X: the signal amplitude has one sign, and on bus X, t is the opposite sign, at input 14 characters of the block number 15 the logical signal will change to the opposite, in one of the triggers 41 or 42 the state will change to the opposite, at one input element 43 EXCLUSIVE OR will be present Oh, n the other - 1 and at its output in Vits 1, which goes to the output 18 of the change of the sign of the block 15, From the output 18 of the change of the sign of the block J5 1 enters the input 21 of the change of the sign of the block 23 and then to the first input of the distributor 36, The distributor 36 - through the first the control output supplies the input of the count 37 control to a signal to switch to subtraction mode, and via the second control output adds a single pulse to the clock input of the counter 37 and at its output the address changes from j + 1 to j. Then this number j through the second input of the multiplexer 27, the distributor 36 puts into memory g the operating memory 33, and into the cell g + 1 records from the permanent memory 28 the number corresponding to the coordinate coordinate in millimeters. The values from the g, g + 1 cells of the RAM 33 under the control of the distributor 36 are successively entered into the multiplier 32, and the multiplication result, which is a rough count of the position of the coordinate remover along the X coordinate, is entered into the cell g + 2 of the RAM 33. So ends the stage

91

a rough reading of the position of the center of the puller coordinates on the coordinate X.

Then, the distributor 36 stops the pulse pulse to the clock input of the counter 37. A precise reading of the position of the coordinate remover begins. Modules read from the same coordinate bus X; the signals in cycles 1,2, ..., P are input to the module of the number 20 of block 23 and then through the first input of the multiplexer 27, under the control of the distributor 36, are placed in the cells Sl, S2, ..., SP of the RAM 33. Next, the distributor 36, using the comparison circuit 31, sorts the numbers in the cell Sl, S2, ..., SP in ascending order, having the smallest number in the cell S1, and the largest number in the cell SP. Sorting is performed P times by sequentially entering numbers from neighboring cells S ;, S, () into the comparison circuit 31 and changing the addresses of the cells if the number from cell S is greater than

from cell S

h then produced

addition of numbers from cells S2 ,, .., SP-1

under the control of the distributor 36 by successive operations of adding the contents of cell j, having an initial zero value, with the contents of cells S2, ..., SP-1 supplied from the operational memory 33 through the switch 35 to the adder 29. The result of each addition from the adder 29 is through fourth multiplexer input

27 is written to RAM 33 at address j. Then the distributor 36 switches the counter 37 to the direct counting mode and gives a single pulse to its clock input. At the output of the counter 37, the address j + 1 is set. The distributor 36 repeats the readout operations of the signal modules from the X bus.

Jm

arranging and sorting them in ascending order in the S1, S2, ..., SP cells and adding numbers from the S2, ..., SP-1 cells, placing the result in the j + 1 cell of the RAM 33. Then, under the control of the distributor, 36 from the j and j + 1 cells of the RAM 33 are sequentially supplied, through the switch 35, which is in the first position, to the adder 29 and the sum A: + AJ4i is written into the j + 2 cell. Then the number A: 4, from cell j + 1 through the switch 35 is entered into the adder 29, the distributor 36 switches the switch 35 to the second pol10

H

into the code shaper 34, from where the additional code of the number L: through the switch 35 enters the adder 29, where by adding it with the additional code of the number its subtraction is performed. The result of adding A -Ai is entered into the j + 3 cell of the operative

memory 33. Then, under the control of the distributor 36, the numbers Aj + Aj-H from cell j + 2 and A: t (-A: from cell j + 3 of operational memory 33 are successively entered into divider 30, where the first

the number is divided by the second. The result of division through the fifth input of the multiplexer 27 is entered into the j + 4 memory cell 33. In the j + 5, j + 6 memory cells 33 from the permanent memory 28, the constants 2 and 0 are sequentially entered through the third input of the multiplexer 27 ,five. Then the contents of the j + 4 and j + 5 cells are successively entered into divider 30, where the first number is divided by the second and the result is entered into j + 7 cell of the operational memory 33. Then distribute -: 36 translates switch 35 and writes constant to adder 29

0.5 Next, the valve 36 transfers the switch 35 to the second position and from cell j + 7 of the operating memory 33 enters the number in the shaper 34 codes, from where the additional

the code of the number from the cell j + 7 enters the adder 29 and by adding it is subtracted from the constant 0.5. The result is an accurate reading of the center position of the puller.

on the X coordinate, remains in the adder 29. The distributor 36 moves the switch 35 to the first position and from the cell g + 2 RAM 33 through the switch 35 brings the value

coarse readout in the adder 29. The result of the addition is entered in the j + S cell. The contents of cell j + 8 RAM 33 is the sum of the coarse and accurate readings of the position of the puller center along the X coordinate. The contents of this cell RAM 33 under the control of the distributor 36 are output to the information output 25 of block 23 and further to the communication line

microcomputer 26.

Similarly, the position of the coordinate remover is determined by the coordinate Y.

Claims (3)

1. A device for reading graphic information containing a plan- Shet with systems of mutually orthogonal coordinate buses connected to the information inputs of the switches, whose address inputs are connected to the first output of the coordinate determination unit, the second output of which is the output of the device, the outputs the switch is connected to the input of the first amplifier, the output of which is connected to the input of a bandpass filter, a low-frequency filter whose output is connected to the information input of the A / D converter, a generator signals, the first output of the shell is connected via a second amplifier with a coordinate remover, inductively connected to the bus and tablet coordinate, which is different (in order to improve the noise-suppression of the device, it contains an analog memory memory and Comparison unit, the outputs of which are connected respectively to the first, second and network information inputs of the coordinate distribution unit, the second output of the Signal Generator is connected to the building input of the analog memory block, whose information input is connected to the output n The OOS filter and the output to the input of the low-frequency filter, the third output of the signal generator is connected to the gate inputs of the analog-digital converter and the comparison unit, the information inputs of which are connected to the outputs of the analog-digital converter. 2. A device according to claim 1, characterized in that the coordinate determination unit comprises a fixed memory, a multiplexer, an adder, a divider, a comparison circuit, a multiplier, a driver, a switch, a distributor and a reversible counter, the counting and control inputs of which are connected respectively with the first and second outputs of the distributor, the third and fourth outputs of which are connected respectively to the control inputs of the multiplexer and RAM, and fifth, sixth, seventh, eighth, ninth and tenth outputs of the distributor s soot5 Q 5 0 0 5 0 45 „. Respectively with the first information inputs of the multiplier, the comparison circuit, the divider, the code generator, the control input of the switch and the first information input of the adder, the second information input of which is connected to the output of the switch, the first information input of which is connected to the output of the imaging module, the output of the reverse the counter is the first output of the block and is connected to the second information input of the multiplexer, the first information input of which is the first information input of the block, the second and three the third information inputs of which are the first and second information inputs of the distributor, the third information input of which is connected to the first output of the comparison circuit, the second output of which is connected to the sixth information input of the multiplexer, the output of which is connected to the information input of the RAM, the output of which is connected to the second information inputs of the switch, code generator, division node, comparison circuit, multiplier and is the second output of the block; the output of the permanent memory is connected to the third and formational multiplexer input, the fourth, fifth and seventh data inputs of which are connected respectively to the outputs of the adder, the divider and the multiplier. 3. A device according to claim 1, wherein the comparison unit comprises a comparator, a key, a permanent memory, two D-flip-flops, an EXCLUSIVE OR element, a counting trigger, and a pulse shaper, whose input is the gate gating input, the first information input which is the first information input of the comparator connected to the information input of the key, the control input of which is connected to the installation inputs of the flip-flops connected to the output of the comparator, the second information input of which is connected to the output of the constant hydrochloric memory forward and inverse outputs countable trigger connected respectively to inputs of the first C and second D-trigge- trench whose outputs are connected to inputs of the EXCLUSIVE OR, the output pulse shaper is connected to the T input of the flip-flop and counting is Gy Line of communication with microEM Ik 27 but P but Jl Fae / 3529 I l lli  L J k -Q " ut pon L,; 12345678 9 10 t 6 4.7 Phage. but 53 L Uhh-y + g (Fti + U} i + 3 I (j + 2) / (J + 3) j + 4 OJ) +6 I (“) L (l + 5) + 7 | «« Mshshshnsh vshshmsh n mmmmkshnshmn ishD V (1 + 7) + and + 6) 53 I 6 Fig.6d