SU1564636A1 - Device for interfacing computer with subscribers - Google Patents

Abstract

The invention relates to computing and can be used in multi-terminal systems, for example, to connect a large number of terminals and peripherals to a central computer. The aim of the invention is to increase the number of subscribers connected to the computer and increase the performance of the device. The device contains a computer communication unit, a second gain node, a switch, a matching resistor block, a group of communication blocks with a subscriber, each of which contains a matching resistor node, a ready trigger, a decoder of the subscriber address, an output gate counter, a subscriber address dial node, four groups of NAND elements, input and output registers, trigger strobe trigger, four NOT elements, delay element, group of elements NOT, group of elements OR — NOT, counter of input gates, two elements AND, three elements NAND. Fifth element NOT, three elements OR, fourth element OR-NOT, third element AND, trigger request are entered into the device in each communication unit with the subscriber. The proposed device implements democratic principles of customer service regardless of their location. This discipline of servicing subscribers, implemented through a priority chain, guarantees access to a computer to any of the subscribers, regardless of its sequence number. 3 il.

Description

The invention relates to computing and can be used in multi-terminal systems, e.g., of the class type, for connecting a large number of terminals and peripherals to a central computer.

The purpose of the invention is to increase the performance of the device and increase the possible number of terminals connected to the computer by providing equal service to subscribers, regardless of their location relative to the computer.

Figure 1 presents the block diagram of the device; Figures 2, 3 are a functional diagram of a communication unit with a subscriber.

The device (Fig. 1) contains a block of communication with a computer, a switch 2, a block 3 of matching resistors, a group of blocks 4 of communication with a subscriber 5, the second is a gain node 6, data bus 7 - addresses, buses (lines) 8-10 signals synchronization of data entry, installation and synchronization of data output, bus (line) 11 and 12 of the readiness signal JQ and service request. The device is connected to the computer 13 „

Each communication unit 4 with the subscriber (FIG. 2, 3) contains a subscriber address decoder consisting of the address and element set field 14 15 and the AND 15, the first OR 16 element, the ready trigger 17, the OR-NOT 18 element group, the first and the second elements are NOT 19 and 20, the delay element 21, the counter of 22 output gates, the first and second elements are AND 23 and 24, the input register 25, the group of elements NOT 26, the first group of elements AND-NOT 27, the fourth element NOT 28, the third element is NOT 29, the trigger 30 is build-25 ba start, the output register 31, the fifth element is NOT 32, the fourth element is AND-HE 33, the third group of elements IS-H 34, node 35 of the subscriber's address set, the fourth group of AND-NOT elements 36, the account-gate of 37 input gates, the first AND-NE element 38, the second group of AND-HE elements 39, the third AND-NE element 40, the second OR element 41 , the second AND-NOT element 42, the query trigger 43, the OR element is $$ NOT 44, the third element is AND 45, the third element is OR 46.

Fig. 1 also shows amplifiers 47 of gain assembly 6; switching elements 48 of switch 2; the decoder 49 TO control signals, the decoder 50 address and the first node 51 of the gain unit 1 of communication with a computer; bus (line) 52-61 external and internal communications device 45

2 shows a node 62 of matching resistors.

Unit 1 is used to transfer from a computer 13 to a data byte device, containing the device address or information code intended for processing, in the device, a reset signal intended for setting the hardware to the initial state, a strobe signal Dan-55e output, accompanying byte data in the output of information from the computer 13, the strobe signal Data

50

$

About 5

five

0

input accompanying bytes of dacha when entering information into a computer 13.

Block 1 is used to transfer 13 bytes of data from the device to the computer, containing the address of the subscriber 5 or information intended for processing in the computer, the signal Ready from the subscriber 5, the signal Service request from the subscriber 5.

Switch 2, when high level signals are present at its control inputs, causes a discontinuity in the passage of information signals. In the presence of a signal O on the first control input of switch 2, the signals are switched from a group of information inputs-outputs to a group of information outputs. If signal O is present at the second control input of switch 2, then a group of information inputs is switched to a group of information inputs / outputs.

The AND-elements 34, 36 and 39, as well as the element OR-NOT 18.J are open-collector elements.

The device works as follows.

The computer 13 places data bytes on the channel line, which is the address of subscriber 5, with which it is necessary to exchange. The data byte is accompanied by a signal. The output data is low, this signal goes to line 10 and to the second control input of switch 2.

All blocks 4 receive information. The output gates counter 22 is recorded 1 if there is a potential signal drop at the counting input of counter 22 from a high to a low level, and at the end of the strobe output data on line 10 the counter 22 is reset if no trigger was raised during the strobe time 17, it can be cocked if the following conditions are met: At the output of the element 15, there is a signal O, which corresponds to the coincidence of the address given on the 7th line address — these channels with the address of the subscriber 5, set using jumpers or switch STUDIO} floor 14 at the entrance 56 there is local hardware readiness signal D (equipment device is ready to work); On line 12, there is no Ready signal from another unit 4 (signal 1 on line 12). Delay time

signal passing The output data through the element 21 must be somewhat longer than the time taken to determine the true value of the comparison signal at the output element AND 15. If the trigger 17 is cocked, the signal from its inverse arm prohibits, via the AND 24 element, the reset of the counter 22 after the end of the signal. The output data in line 10. The operation described is a bus catch operation. The signal from the forward arm of the trigger 17 through the element OR NOT 18.1 sets on line 11 the signal Ready to zero level.

The computer 13 receives the Ready signal from line 11 and, if available, continues the exchange, or organizes a new exchange cycle. On a ready signal, the computer exposes on line 7 a new data byte that is intended to control the operation of the selected subscriber 5, which can be terminals and other peripheral devices. The data byte is accompanied by a signal. Output data on line 10.

Trigger 17 cannot be cocked on any block 4 (even if the code on lines 7 of the channel coincides with the device address), since the Ready signal is present on the channel line, i.e. all blocks 4, except the block that captured the bus, ignore the information.

At the first output of counter 22 of block 4, with-which is exchanged, signal 1 appears, according to which information from channel line 7 is written to input register 25. On line 54

signal 1 appears

informing

subscriber about the availability of information in the input register 25, in which it will be stored until subscriber 5 puts 56 a signal on the hardware 56 Low level hardware ready and the computer 13 starts a new exchange cycle with subscriber 5. Upon termination of the signal Output data trigger 17 cleared, the Ready signal on line 11 goes high, and counter 22 is updated.

At this time, the communication cycle Reception ends.

To transfer bytes to computer 13, the subscriber analyzes the signal on line 55 Transmitter readiness. If there is a signal on line 55, 1 subscriber exposes 52 bytes on lines 52

formations and produces on line 57 the strobe Zero start. But the Start Gate data is written to the output register 31, the trigger gate 30 of the start gate is set to one, and a zero level signal appears on line 55. Information is recorded regardless of the signal level on lines 8 and 12.

A signal on line 12 The request for a single level service informs the computer that at least one of the communication units with the subscriber has information for 5 transmissions.

Consider the operation of the Kth communication unit with the subscriber. If all communication units with subscribers from (K + 1) -th to M have not set the service request signals, then the request trigger 43 is set. One is set, otherwise waiting for them to be served, and after 4.M service unit (with the highest 5 sequence number) and occurrences of signal O on line 12 in all blocks 4, awaiting the transfer process, are set to triggers 43, forming a queue of sources for transferring information to the computer 13 communication with the subscriber leader / queue. The signal O from the inverse shoulder of the trigger 43.K blocks the passage of the signal. Input data of the zero level in the (K + 1) -th communication unit with the subscriber and enables operation of the input gate counter 37.

After the subscriber 5 has sent a request for a high level service to line 12, the computer 13 must issue a Q (after an arbitrary period of time) signal input data that only block 4.K receives is the leader of the queue. Information is recorded in the input gate counter 37 when the potential difference from one to zero is present at its counting input. At the output of the element OR-NOT 44 for the duration of the signal. The input data to line 0 of the data 8 is removed from the buses 7 and the output of the counter 37 shows the signal 1.

After an arbitrary time interval, the computer 13 generates the following signal e Input data. If in this block. 4 the trigger 43 is cocked and block 4 is the queue leader, then for the duration of the signal the input data of the zero level at the output of the AND 45 element

five

a signal I is generated which opens the AND-HE elements 34 and 39 for transmitting information from the output register 35 to the buses 7 and further to the channel line.

Claims (1)

On the second signal edge, the input data is reset by triggers 30 and 43, and counter 37 is zeroed. Invention Formula A device for interfacing a computer with subscribers, comprising a computer communication unit consisting of a first gain node, an address decoder and a control signal decoder, a second gain node, a switch, a matching resistors block, a group of communication blocks with a subscriber, the first one the second, third outputs and the first, second inputs of the first gain node are connected respectively via the decoder of control signals to the first, second, third inputs and the first, second, third inputs and the first, second outputs of the second gain node, allowing th input of decoder control signals is connected via an address decoder to a group of the first node and outputs gain information group of switch inputs, outputs trup- pas which is connected to a first node group -Log gain band information input-output switch is associated with a group of the conclusions a block of sources of matching and with a group of information outputs-inputs of each communication unit with a subscriber of a group, a group of inputs-outputs of the first gain node is a group of inputs / outputs of a device for connection to information control buses of a computer, third and fourth outputs of the decoder control the signals are connected respectively to the first and second control inputs of the switch, the synchronization input data output input, the installation input and the readiness output of each communication unit with the subscriber of the group are connected respectively to the third and the fourth outputs and the fourth input of the second gain node and are connected respectively to the first - third inputs / outputs of the matching resistor unit, the fifth output and the fifth input of the second gain node are connected respectively to the input synchronization input and the service request output of the first communication unit with the subscriber group, and the input data synchronization output and the service request input of the 1st communication unit with the subscriber of the group (i I, M-1) are connected respectively to the input data input synchronization and the service request output neither (i + l) -ro of the communication unit with the subscriber of the group, and the input synchronization output of this M-th communication unit with the subscriber is connected to the input-output of the matching resistor unit, the group of information inputs and the group of information outputs of each communication unit the subscriber of the group are the corresponding groups of inputs and outputs of the device for connecting to the groups of information outputs and inputs of the corresponding subscriber Exit Ready receiver, Exit transmitter ready output, Subscriber hardware ready output, Output synchronization input The bonders of each communication unit with the subscriber of the group are the corresponding outputs and inputs of the device for connection to the first and second readiness inputs, the first and second synchronization outputs of the corresponding subscriber, each communication unit with the subscriber of the group containing a matching resistor node, readiness trigger, address decoder subscriber, output gates counter, subscriber address set node, four groups of NAND elements, input and output registers, trigger strobe trigger, four NOT elements, delay element, group e NOT elements, a group of elements OR NOT, an input strobe counter, two AND elements, three AND-NOT elements, the output register input groups and the output register inputs are respectively a group of information outputs and a group of information inputs of a communication unit with a subscriber, the first the group of information inputs / outputs of which is connected to the first inputs of the NAND elements of the first group and to the group of outputs of the NAND elements of the second group, the input of the first element is NOT the synchronization input of the data output of the communication unit with the subscriber, and the output is connected ene with input of a second NOT member and the second inputs of AND-NO elements of the first group, the outputs of which directly and through the NOT element group are connected respectively to the first and second groups of information inputs .abonenta address decoder outputs the first group elements are not pod91 are connected to the group of information inputs of the input register, the sync input of which is connected to the readiness output of the receiver of the communication unit with the subscriber, the first output of the output gates counter and the first input of the first element And, the counting input of the counter of output gates through the delay element is connected to the output of the second element NOT and the first input the second element And, in the second input connected to the zero output of the ready trigger, a single output of which is connected to the input ten connected to the output of the second element NO, the output of the second element AND is connected to the reset input of the output gate counter, the unit output of the trigger trigger gate is connected with the first input of the second element OR, the first input of the second AND-NOT element, the reset input of the request trigger, a setup input connected to the output of the second INE element, the inverse input of which is connected to the second input of the second OR element and is the service request input of the communication unit with the subscriber permission to write the input register of the group 15, the output of the second element OR and the input of the first element OR of the NOT group, the output of which is the ready output of the communication unit with the subscriber, the reset input of the ready trigger, is connected with the output of the second OR OR NOT group, the first and second inputs connected respectively to the output of the first AND element and the third output an element of the OR-NOT group whose input is the input of the communication unit installation with the subscriber and is connected to the first input of the first NAND element, the input of the third element is NOT the input synchronization output of the subscriber, the output of the third element is NOT associated with syn the output register of the output register and the setup input of the start gate trigger, a group of outputs of the output register connected to the first inputs of the second group AND elements of the second group, the outputs of the third and fourth group AND elements of the third and fourth groups of the second group and the inputs of the matching resistors , characterized in that, with performance goal operation of the device and increase in the number of connected subscribers, in each communication unit with the subscriber of the group entered the fifth element NOT, the three elements OR, the fourth element AND-NOT, the element OR — NOT, the third element AND, the request trigger, and the installation input of the readiness trigger with the output of the first OR element, the first to the fourth inputs of which are connected respectively to the second input of the output gate counter, the input of the readiness of the communication unit subscriber to the group subscriber, to the output of the address address decoder and to the output of the fourth e the element NOT, the input of the first element OR of the group connected to the output, the second input of the first element AND 20 25 thirty 35 40 45 50 55 is the output of the request for service of the communication unit with the subscriber of the group, the zero output of the start gate trigger is the output of readiness of the transmitter of the communication unit of the subscriber of the group of the reset input of the trigger of the start gate connected to the output of the first AND-NOT element, the second input connected to the third AND-NOT element, the first input of which is associated with a single output of the request trigger, zero output of the OR-NOT element connected to the first input, to the reset input of the input gate counter and the first input of the fourth AND-NOT element, the second input It is connected with the counting input of the input gate counter, the first input of the third element AND and the output of the fifth element NO, whose input is connected to the second input of the OR-NOT element and is the input of synchronization of the data input of the communication unit with the subscriber of the group, the output of the fourth element IS-NOT is the output of data input synchronization of the communication unit with the group subscriber, the first output of the input gate counter is connected to the third input of the OR-NOT element and the second input of the third AND element, the output connected to the first input. The third OR element and the second inputs, the third group AND-NES elements, the second output of the input gate counter is connected to the second input of the third AND-NO element, the OR element output is NOT connected to the second third OR input and the first inputs of the fourth AND AND NO element group, the group of outputs of the subscriber address set node is connected to the second inputs of the NAND elements of the fourth group, the output of the third element OR is connected to the second inputs of the elements of the NAND second group. 20 five 0 five 0 five 0 five is the output of the request for service of the communication unit with the subscriber of the group, the zero output of the start gate trigger is the output of readiness of the transmitter of the communication unit with the subscriber of the group, the reset input of the trigger of the start gate is connected to the output of the first element IS-NOT, the second input connected to the output of the third element NAND, the first input of which is associated with a single request trigger output, zero output of the OR-NOT element connected to the first input, the input gate counter reset input and the NAND element first input, the second input connected to the counting input of the input gate counter, the first input of the third AND element and the output of the fifth NO element, whose input is connected to the second input of the OR-NOT element and is the input data input synchronization input of the communication unit with the subscriber of the group, the output of the fourth AND element -NOT is the data input synchronization output of the communication unit with the group subscriber, the first output of the input gate counter is connected to the third input of the OR-NOT element and the second input of the third AND element, the output connected to the first input. The third OR element and the second inputs, the third group AND-NES elements, the second output of the input gate counter is connected to the second input of the third AND-NOT element, the output of the OR element is NOT connected to the second input of the third OR element, and the first inputs of the AND-NO elements the fourth group, the group of outputs of the node set address of the subscriber is connected to the second inputs of the elements AND-NOT of the fourth group, the output of the third element OR is connected to the second inputs of the elements AND-NOT of the second group. ew hFJ 9C9WI