SU1564566A1 - Digital phase calibrator - Google Patents

Abstract

The invention can be used in information-measuring equipment and electrical engineering when creating exemplary sources of phase shift. The goal is to improve the accuracy of the phase shift while reducing the nonlinear distortion of the output sinusoidal signals - achieved by introducing a subtractive amplifier 9, 14, 15 sampling-storage circuits, integrators 16, 17, analog switches 10-13, trigger 7 and a single-vibration into the digital phase calibrator. 8. The digital phase calibrator also contains a setpoint adjuster 1, a computing unit 2, a generator 3, an operational storage element 4, a counter 5, a code-voltage converter 6. 2 Il.

Description

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The invention relates to information-measuring technology and electrical engineering and can be used to create exemplary sources of phase shift.

The purpose of the invention is to improve the accuracy of reproduction of the phase shift while reducing the nonlinear distortion coefficient of the output sinusoidal signals.

The goal is achieved by the fact that a digital phase calibrator containing a code setter, a computing unit, a controlled generator, an operational storage element, a counter and a converter code - voltage, additionally contains a trigger, a single vibrator, a subtracting amplifier, four analog switches, two sampling-storage schemes and two integrators.

 FIG. 1 is a block diagram of a digital phase calibrator; in fig. 2 - timing charts of the device.

The digital phase calibrator (Fig. 1) contains a master of 1 code, a computing unit 2, a generator 3, a memory element (033) 4, a counter 5, a converter code - voltage (PKN) 6, trigger 7, a single vibrator 8, a subtracting amplifier (WU) 9, the first - the fourth analog switches 10-13, the first and second sampling-storage circuits (SVX) 14.15, the first and second integrators 16, 17, and where the output of the unit 1 of the code is connected to the input of the computing unit 2, the outputs which are connected to the information inputs 033 4, and the control input of the generator 3, the output of which is n with the inputs of the counter 5, the trigger 7 and the one-shot 8; 11 and 13 is connected to the outputs of the integrators 16 and 17, and its output is connected to the information inputs of the SVX 14 and 15, the sampling inputs of which through the first and third analog switches 10 and 12 are connected to the output of the one-oscillator 8, and the outputs are connected to the inputs of the integrators 16 and 17 The control inputs of analog switches 10-13 under lyucheny to exit the trigger 7.

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The device works the next time.

Information about the phase difference cf, the frequency of the output signals F, the mode of operation of the calibrator contained in the sensor code 1, is read by the computing unit 2.

Depending on the chosen mode of operation, computing unit 2 calculates N values of the function (X) and, (X + if), where av is the required phase difference, and N is the number of function values needed to approximate one oscillation period with the required value of the nonlinear coefficient distortions. To obtain a sinusoidal output, the values of Y sinX, Y З1п (X + C) are calculated, where X 2fiFt, and recorded in OZE 4, and the values of the functions Yt and Y are written alternately (Yf, Ylf, Y (g, Y, Y, etc.). Then the computing unit 2 issues a frequency code to the control input of generator 3, whose frequency is equal, and the calibrator goes into generation mode. The clock frequency goes to counter 5, which forms the address of the OES 4. At the output of OZE 4 alternately there will be time-varying codes of the functions Y, and YJ, which are fed to the input of the PCN 6. At the output of the PKN 6, a mixture of two approximated step-sinusoidal signals with adjustable phase difference is formed. This mixture of two signals is divided into two separate signals using SVX 14, 15, and integrators 16, 17 linearly interpolate the step signal from the SVX outputs. 14, 15. The outputs of the integrators 16, 17 are the outputs of the calibrator U1 and U7.

At the initial moment of the calibrator's operation in the generation mode, the signal from the trigger output 7 (Fig. 2a) causes the output of the first integrator 16 to be connected to the direct input of the VU 9 via the second analog switch 11, and the one-shot 8 output to the input input of the first SVC 14 via the first analog key 10. At the same time, the counter 5 gives the address of the zero cell of the OZE 4, in which the code corresponding to the zero voltage at the output of the PCN 6, respectively, at the output of the PCN 6, the voltage is zero Then at time t, (Fig. 2) differential 1/0 voltage output generator (FIG. 2BU, causing the switching of the counter 5. Counter 5 outputs the address of the first cell of the PHE 4, in which the code of the first value of the function Yv is stored. This code is fed to the input of the PCN 6 (FIG. 26), and at its output (FIG. 2d) By the time t, a voltage signal proportional to the first value of the function Y is set. This signal is fed to the inverse input of the VU 9, and the direct input of the VU 9 is supplied with the current value of the output signal of the first channel of the calibrator obtained from the output of the first integrator 16 ( ), at the initial time equal to zero. By the time tg, the difference between the signals from the FCP output and the output of the first channel of the calibrator is established at the output of the VU 9 (Fig. 2e). At this moment, the one-oscillator 8, triggered by the 1/0 differential of the generator 3 signal, produces

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the difference between the signals from the VCP 6 and the second channel of the calibrator is set. At this moment, the simulator 8, triggered by the I / O differential of the generator 3 signal, generates a short strobe pulse that records the difference signal from the output of the ASU to the SVX 15. From the SVX 15 output, the difference signal is fed to the input of the integrator 17 (Fig. 2n ), and the voltage at its output begins to vary linearly (Fig. 2g).

Then, at time t6, the first channel of the calibrator is connected again, and then the whole process repeats for the following values Y1 and Y ,.

Thus, SVX 14 and 15 realize, ultimately, the function of channel separation of the calibrator, and kx, as a first approximation, the output signals can be considered as derivatives of the corresponding output signals

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recording the differential signal from the output of the VU 9 to the SVX 14, From the output of the SVH 14, the differential signal is fed to the input of the integrator 16 (FIG. 2h), and the voltage at the output of the integrator 16 begins to vary linearly 0

At time t3, the voltage output 0/1 appears at the output of the generator 3, causing switching of the trigger 7, and the signal from the output of the trigger 7 causes the first and second analog switches 10 and 1 to open and the third and fourth analog switches 12 and 13 to close. As a result of these switchings, the output of the second integrator 17 is connected to the direct input of the VU 9 via the fourth analog switch 13, and the one-shot output 8 to the input input of the second SVX 15 via the third analog switch 12 Then at time ty a difference 1 / appears 0 signal generator ora 3, causing the switching of the counter 5, the counter 5 gives the address of the second cell OZE 4, in which the code of the first value of the function Y4 is stored. This code goes to the PCN 6, and a voltage signal proportional to the first value of the function is set at its output at time ts Y. Further, this signal is subtracted from the signal from the output of the second channel of the calibrator (fig, 2g) by the subtracting amplifier 9, n to the time tj at the output of the VU 9

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14 and 15 are produced alternately, periodically. During the time that the SVX 14 and 15 store instantaneous values of the signal, the voltage at the inputs of the integrators 16 and 17 remains constant, and their output voltages linearly or linearly decrease depending on the sign. are increasing. From such linear portions, an output signal is generated.

The output signals of the two channels of the calibrator are formed using one PKN, which excludes, compared to the prototype, phase errors caused by the non-identity of parameters of individual PKNs, moreover, the linear interpolation of the step-sinusoidal signal obtained from the PKN output, due to the introduction of additional elements, connected in this way with the rest of the circuit elements, allows to obtain a sinusoidal signal with small non-linear distortions without using low-frequency filters, which in the prototype azovy errors. The proposed calibrator allows to obtain a high accuracy of reproduction of the phase shift due to its insensitivity to the variation of the parameters of elements, displacements, drifts of SVX and integrators, due to the fact that the first and second channels of the calibrator are essentially covered by pulsed

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the difference between the signals from the VCP 6 and the second channel of the calibrator is set. At this moment, the simulator 8, triggered by the I / O differential of the generator 3 signal, generates a short strobe pulse that records the difference signal from the output of the ASU to the SVX 15. From the SVX 15 output, the difference signal is fed to the input of the integrator 17 (Fig. 2n ), and the voltage at its output begins to vary linearly (Fig. 2g).

Then, at time t6, the first channel of the calibrator is connected again, and then the whole process repeats for the following values Y1 and Y ,.

Thus, SVX 14 and 15 ultimately realize the function of separating the calibrator channels, and kx, in the first approximation, the output signals can be considered as derivatives of the corresponding output signals of the first and second canapo.

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14 and 15 are produced alternately, periodically. During the time that the SVX 14 and 15 store instantaneous values of the signal, the voltage at the inputs of the integrators 16 and 17 remains constant, and their output voltages linearly or linearly decrease depending on the sign. are increasing. From such linear portions, an output signal is generated.

The output signals of the two channels of the calibrator are generated using one PKN, which excludes, compared to the prototype, phase errors caused by the non-identity of parameters of individual PKNs, moreover, the linear interpolation of the step-sinusoidal signal obtained from the PKN output, due to the introduction of additional elements connected in this way with the rest of the circuit elements, allows to obtain a sinusoidal signal with small nonlinear distortions without using low-frequency filters, which introduce in the prototype azovy errors. The proposed calibrator allows to obtain a high accuracy of reproduction of the phase shift due to its insensitivity to the variation of the parameters of elements, displacements, drifts of SVX and integrators, due to the fact that the first and second channels of the calibrator are essentially covered by pulsed

71564566

deep negative feedback through analog switches, a subtracting amplifier, and sampling-storage circuits.

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Claims (1)

Invention Formula A digital phase calibrator containing a code master, the output connected to the computing unit, the outputs of which are connected to the information inputs of the operational storage element and the input of the generator, the output of which is connected to the input of the counter, the outputs of which are connected to the address a subtracting amplifier, two sampling-storage circuits, two integrators, four analog switches, a trigger and a single vibrator, the converter output being a voltage-voltage signal connected to the reverse input of the subtracting amplifier whose direct input is connected via the first and fourth analog switches and the second integrator, the output of the subtracting amplifier is connected to the information inputs of the first and second sampling-storage circuits, the sampling inputs of which through the first the inputs of the RAM 15 and the third analog keys are connected The output of which is connected to the inputs of the corresponding bits of the converter code - voltage, characterized in that, in order to improve the reproduction accuracy of the phase shift by 7P while simultaneously reducing the nonlinear distortion coefficient of the output sinusoidal signals, Af, /, tttst LI with the output of the one-shot, the input is connected to the output of the generator, the outputs of the first and second sampling-storage circuits are connected to the inputs of the first and second integrators; respectively, the control inputs of the analog switches are connected to the output of a trigger, whose input is connected to the output of the generator TSHT AT f4H eight subtractive amplifier, two sampling-storage circuits, two integrators, four analog switches, a trigger and a single vibrator, with the converter output code-voltage connected to the inverse input of the subtracting amplifier, whose direct input is connected to the outputs of the first through the second and fourth analog switches and the second integrator, the output of the deducting amplifier is connected to the information inputs of the first and second sampling-storage circuits, the sampling inputs of which through the first and the third analog keys are connected and the third analog keys are connected with the one-shot output, the input of which is connected to the generator output, the outputs of the first and second sampling-storage circuits are connected to the inputs of the first and second integrators, respectively, the control inputs of the analog switches are connected to the output of the trigger, the input of which is connected to the output of the generator