SU1562976A1 - Device for detecting errors in code sequence - Google Patents

Abstract

The invention relates to computing and is intended for use in digital devices for processing, storing and transmitting data. A device for detecting errors in a code sequence solves the problem of detecting errors in the numbers represented in the slave code, i.e. conditional deduction code. The purpose of this invention is to improve speed. In the device, an error sign is generated after comparing the given number with the boundary of the range of representation of numbers in the code of conditional residues. In case of an error in one of the residues, this number is outside the range of the original range. If the number does not exceed this range, "1" is generated at the output of the device, otherwise - "0". Thus, an error is detected. The device comprises a memory block 1 and a summation block 2 with corresponding links. 1 il.

Description

J.

AND

SP OE

uh

CD -h |

WITH&

1

one

The invention relates to computing technology and is intended for use in digital computing machines and information exchange devices,.

The purpose of the invention is to increase speed.

The diagram shows a device for detecting errors in a code sequence; 2 is a diagram of a JQ summation block

The device (FIG.) Contains a memory block 1, a summation block 2 A summation block 2 (FIG. 2) contains adders 3 connected pyramidally. J5

A device for detecting errors in a code sequence implements a conditional residue code (WU code), the use of which for controlling numbers is as follows. 20

The information part of the code of a number represented in any number system, including binary, or any code represented as a set of digits, is followed as with 25 known control methods modulo a control sign. In contrast to the known methods, the calculation of the control sign and the detection process errors. concluded as follows. thirty

The source code is conventionally divided into a certain number of groups of bits, each of which is considered as the remainder of dividing a certain number A by a set of mutually simple bases P,, Pj, ... Ph. Thus, the source code, for example, the binary number A, is represented as the conditional number A1

A o, 0 (4, .o o, dn, 40 and conditionally read by a number in the system of residual classes, where o is the remainder of dividing the conditional number A1, the binary code of which corresponds to the original number A, by a set of 45

-P.- (i 1.2, ..., and).

To detect errors in such a number A, it is necessary to introduce redundancy, Qnost, using the remainder d PM d from dividing the number A by an additional basis — the control module q. The calculation of this residual can be carried out according to the rules known in the residual classes.

From the theory of residual classes it is known that under the condition

q Ph,

where Ph is the largest conditional base of their aggregate, it is possible to detect errors of any multiplicity in one of the bases of. A numbers with probability equal to one.

Representing the source code A together with the control sign a as a conditional word in the system of residual classes (conditional residue code) allows using for the error detection the fact that any distortion of the conditional code on one of the conditional bases R. translate the conditional number A from the range

(0, P) in the range (P,) where P

t «t Р, R. For undistorted number

true n + t

Z

where --V- - i

 G, 5-, f,

- threshold constant;

m

rc-bv I / rm

the weight of the 1st orthogonal basis;

R-pjp;

C S - whole part.

rt

Values ™ (, 2, .., p-I) can be calculated in advance and recorded accordingly

in memory block 1.

i

In block 2 of the summation, the input of the threshold constant of the device is connected to the free input of the total input from summers 3 with the number of bases not equal to 2 (k is a natural number). If the number of bases is 2, then an additional Russian is entered, from one Sum-Mountain 3, which performs the function of subtracting the threshold constant (addition with an additional code). Beginning with adder 3, to which the threshold constant value arrives, adders 3, having a sign bit, are used in the corresponding branch of summation block 2. Since only the fractional part of the number is summed, the transfers of adders 3 are ignored.

The device works as follows.

The inputs of the device group are supplied with information corresponding to the representation of the controlled number in the WU code for all conventional bases, including the control one. This information enters memory block 1. In block 1 of memory, a tabular multiplication of the value o occurs (- by a constant

g; -1-. Block 2 summation calculates

t; P + f

Wi

fractional part of the sum of 2L about (- -, and in

one of the branches of the adders 3 includes the input of the threshold constant of the device in the additional code and such

how the value of the expression is calculated. The error detection signal is removed from the sign bit of the adder 3 of the last level. Output 1 corresponds to the absence, and output O - the presence of an error in the controlled number.

Editor L.Zaytseva

Compiled by AO Klyuev Tehred L.Olinnyk

Order 1068

Circulation 658

RCCPI of the State Committee for Inventions and Discoveries at the State Committee for Science and Technology of the USSR 113P13, Moscow, F-15, Pavmskan nab. 4/5

0

five

Claims (1)

Invention Formula A device for detecting errors in a code sequence containing a memory block and a summation block, the group of information inputs of the device being connected to the corresponding address inputs of the memory block, the output group of which is connected to the inputs of the corresponding summands, in addition to the highest, of the summation block, in order to increase speed, the input of the threshold constant of the device is connected to the input of the senior term of the summation block, the sign bit output of which is the output of devices . XJ, Black Corrector Subscription