SU1554135A1 - Quasisensor switch - Google Patents

Abstract

The invention relates to a pulse technique and can be used in input and output devices. The purpose of the invention — extending the functionality — is achieved by completing the first diodes of 5 cells 2 with light-emitting diodes, and the improvement in mass-dimensional performance is due to eliminating from cells 2 from the 2nd to Mth capacitors and introducing 1 HE cell 7 into the first cell. the second diode 8 and the third resistor 6, and in the remaining cells 2 of the fourth resistor 12. The device contains the first cell 1 and M-1 cells 2, resistors 10 and 11, and the first cell 1 contains the element 4, the output of which through parallel connected diode 5 downstream condensate op 9 and series-connected element 7 are NOT and the forward-connected diode 8 is connected to the first input of the element AND 4 cells 1, the remaining M - 1 cells contain each element 4, diode 5, switching element 3 and a resistor 12 connected between the common bus and the first the input of the corresponding element And 4, the second output of the corresponding switching element 3 and the cathode of the corresponding first diode 5, the first output of the switching element 3 of the second cell 2 is connected to the second input of the And 4 element of cell 1 and through the third resistor 6 to the common bus. 1 hp f-ly, 1 ill.

Description

one

(2J) 4393828 / 24-2J

(22) 03/17/88

(46) 03/30/90. Bul No. J2

(75) E.A. Deer

(53) 621.32 (088.8)

(56) USSR author's certificate

 1257829, cl. H 03 K 17/00, 1987.

(54) QUASISENSOR SWITCH (57) The invention relates to a pulse technique and can be used in information input and output devices. The purpose of the invention — extending the functionality — is achieved by completing

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BE) ix of the diodes of 5 cells 2 are light-emitting, and the improvement of mass-dimensional parameters is due to the exclusion of cells 2 from the second M capacitor and the introduction of the HE 7 element in the first cell 1, the second diode 8 and the third resistor 6, and in the remaining M-1 cells 2 of the fourth resistor 12. The device contains the first cell. 1 and M-1 cells 2, resistors 10 and 11, and the first cell 1 contains an AND 4 element, the output of which is through a parallel-connected diode 5 in the forward direction, a capacitor 9 and the successively connected element 7 and NOT

The invention relates to a pulse technique and can be used in information input and output devices.

The purpose of the invention is to improve the mass and size parameters, as well as to expand the functionality by performing the first cell diodes with light-emitting diodes.

The drawing shows a functional diagram of the proposed device.

The device contains the first cell 1 reset information, the remaining M-1 cells 2, the switching element 3 M-1 cells 2, the element And 4 M cells, the first diode 5 M cells, the third resistor 6 of the first cell 1, the series-connected element HE 7 and the second the diode of the first cell 1, the capacitor 9 of the first cell 1, the first and second resistors 10 and 11, respectively, as well as the fourth resistor 12 cells 2. In M-1 cells 2, the first outputs of the switching elements 3 are connected to the inputs of the switching elements 3 of the previous cells 2. The second the outputs of the elements of the 3 switching cells 2 are connected to the first in odes respective AND gates 4 and the cathodes of the respective diodes 5. Second inputs of AND gates 4 cells 2 are connected to a first input of AND 4 1 of the first cell and through the second resistor 11 to sheathe bus. The input of the switching element 3 of the M-th cell 2 through the first resistor 10 is connected to the positive power rail. The first output of the switching element 3 of the second cell 2 is connected to v

Directly connected diode 8 is connected to the first input of the element AND 4 cells 1, the remaining M-1 cells contain each element AND 4, diode 5, switching element 3 and resistor 12 connected between the common terminal and the first input of the corresponding element 4, the second output of the corresponding switching element 3 and the cathode of the corresponding first diode 5, the first output of the switching element 3 of the second cell 2 is connected to the second input of the I 4 terminal 4 and through the third resistor 6 to the common bus. 1 il.

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the second input element And 4 of the first cell 1 and through the third resistor 6 with a common bus. The capacitor 9 is connected in parallel to the series-connected element HE 7 and the second diode 8 and is connected between the output and the first input of the AND 4 cell 1.

The device works as follows.

At the time the power is turned on, the capacitor 10 of the information reset cell 1 is discharged, so a logical O is output at the output of the corresponding element 4 and 4 at the combined inputs of the elements 4 of the cells 4 and 2 and their other inputs also o. at the output of the element AND 4, cell 1 contributes to the formation of a high voltage level at the output of the element HE 7 and the cathode of diode 8, as a result of which the capacitor 9 is charged and the input of the element AND 4 of cell 1 appears logical 1. Due to the other input element and 4 che Ki 1 through the first resistor 10 and the closed contacts of the switching elements 3 enters the power supply 1 corresponding to the logic level 1, the element 4 of cell 1 is turned on and a high voltage potential appears at its output and goes through the diode 5 cells 1 to the input of the element AND 4 cells I and to the combined inputs i of the elements AND 4 cells 2. At the same time, the capacitor 9 is discharged, O, but Elea515 appears at the output of the element HE 7

Ment And 4 cells 1 remains on. The state of cells 2 does not change.

When any button of the switching element 3 is pressed at the moment of opening its normally closed contacts, the voltage level of logical 1 is removed from the corresponding element AND 4 cells 1, which leads to the formation of a low voltage level at its output, its other input, the combined inputs of the elements And 4 cells 2, the outputs of cells 2 and the input element HE 7. At the same time the cells 2 are zeroed out, and at the output of the element HE 7 and the cathode of diode 8 there is a high voltage level contributing to the charge of the capacitor 9. The charge time is determined em duration necessary for the reset pulse turn-off cells 2. After charge capacitor 9 on all combined inputs II elements 2 to 4 cell is a logic 1.

At the moment of normally normally open contacts closing, the pressed switching element 3, the level of the power supply is fed to the input of the element AND 4 of cell 2, which leads to the appearance at its output and output of the corresponding cell of a high voltage level, which through the corresponding diode 5 enters the first input of the corresponding element AND 4. After releasing the pressed switching element 3, the corresponding element 4 and, consequently, the corresponding cell 2 remain switched on. After the contacts of the switching element 3 of this cell 2 occupy their initial position, the power supply voltage arrives at the input of the element 4 of the cell 1, and a high voltage level appears at its output, which also occurs at the input of the element NO. 7 and the input element AND 4 cells 1. The capacitor 9 is thus discharged, at the output of the element NOT 7 O appears, but the element AND 4 cells 1 remains on and logical 1 at the combined inputs of the elements AND 4 cells 2 item output And 4 cells I.

When another switching element 3 is pressed to turn on another cell 2 at the moment of opening the corresponding normally closed contacts, the output of cell 1 is formed

356

a reset pulse, which is fed to the combined inputs of the elements AND 4 cells 2, whereby the cell 2, previously turned on, is turned off. At the instant of closing the normally open contacts of the pressed switching element 3, the other cell 2 is turned on.

Claims (2)

1. A quasi-sensor switch containing the first and second resistors of M cells, each of which contains an element And a first diode connected in the forward direction to the output of the corresponding element And and its first input, the first cell contains a capacitor connected between the output and the first input of the corresponding And, the remaining M-1 cells contain a switching element, whose input in the M-cell is connected via the first resistor with a positive power supply bus; in the cells with the second and M-th cells - with the first output of the corresponding element the switching cell of the previous cell, and its second output is connected to the first input of the corresponding element I, the second inputs of the elements Ive cells from the second to Mth are connected via a second resistor with a common bus, which is mass and dimensions, the first cell contains the NOT element, the second diode and the third resistor, and the fourth resistor is inserted into each of the remaining M-1 cells, the output of the AND cell of the first cell is connected through the series-connected NOT element and the second diode in the forward direction the input of the element And the first cell and the second inputs of the elements And cells from the second to the Mth, the second input of the element And the first cell is connected to the first output of the switching element of the second cell and through 715541358 the third resistor to the common bus and 2. The switch according to claim 1, which contains the entrances of the elements of the cells and the cells with the second so that a swarm of Mth is connected through the corresponding extensions of functional potential fourth resistors, the first diodes of the cells with the second common shinepoo mth made light-emitting.