SU1552113A1 - Frequency-to-code converter - Google Patents

Abstract

The invention can be used in automated systems for collecting information on the state of the parameters of electrical objects. The purpose of the invention is to improve the reliability of the device by eliminating failures in its operation. The device contains a generator 1, an exemplary frequency, a key 4, the first element OR 9, a reversible counter 12. The device has a controlled frequency divider 2, an amplifier driver 3, the first 5 and the second 6 short pulse drivers, the first 7 and the second 8 one-shot, the second element OR 10 and the counting trigger 11, which made it possible to increase the reliability of the device in operation by eliminating failures when the pulses formed from the input and reference sequences coincide. 2 Il.

Description

1

This invention relates to a measurement technique and can be used.

in automated systems

collecting information on the state of parameters in electrical objects.

The aim of the invention is to improve the reliability of the device by eliminating malfunctions.

Figure 1 shows the functional diagram of the device; figure 2 - diagrams of his work.

The frequency converter in the code will generate 1 model frequency generator, a controlled frequency divider 2, a driver amplifier 3, a key kt the first and second drivers 5 and 6 short pulses, the first and second single vibrators 7 and 8, the first and second elements OR 9 and 10, counting trigger II and reversing counter 12.

The exemplary frequency generator 1 is connected to its output through a controlled frequency divider 2, the first

the one-shot 7 and the first pulse shaper 6 with the subtracting input of the reversible counter 12. The converter's input is the input of the power amplifier 3, the output of which is connected via key 4, the second element OR 10 with the summing input of the reversible counter 12 "The second input of the element OR 10 through the pulse shaper 5 is connected to the output of the trigger-pja I, the counting input of which is connected by the ct output of the amplifier forming 3, the reset input and the second key input - by the output of the first element OR 9 in | and the first outputs of which are connected continuously outputs a single-novibratorov 7 and 8, and 8 topa odnovibra- input coupled to the output 7. odnovibra- topa control bus frequency divider 2 is connected to the output line down counter 12 '

The frequency converter in the code works as follows

The signal of the measured frequency in the amplifier-former 3 is transformed into a sequence of short pulses (diagram U3) with frequency fx and through the key kt the second element OR 10 to the summing input of counter 12. Simultaneously to the subtractive & stroke of counter 12 from the generator of the frequency through the divider 2 frequencies, one-shot 7 and driver 6 pulses are received with a frequency

f Mo, (D

where kg & 6 (t) / 2n is the division factor of the divider 2 frequencies,

which depends on the state of the reversible counter) due to the presence of feedback from the counter output to the splitter input bus 2 frequencies; f0 - generator frequencies

exemplary frequency;

n is the width of the reversible counter 12 and the control bus of the splitter 2 frequency.

The change in the state of the counter 12 is determined by the difference in pulses per unit time arriving at its summing and subtracting inputs. Using the continuous model of the operation of the counter 12, true for, where the intermediate frequency of the divider is, we have

MU Ј f f LMf m dtrx rz rx 2W °

or

de4 (t) f0 (. dt 2 (}

/ a

Denoting $ f0 / 2, we get A ,, ..

 -f ,,

the solution of which is recorded in the following form

) "(A, - G

+ f

V

with

where oio is the state of the counter at the moment

time t 0. When the time period expires

 C ... 5) y, (5) at the output of the reversible counter, a steady state value is formed, the first member in equation (4) can be neglected, then we finally get

ai (t)% 2P | «-. (6)

(G - t0

Thus, the state of the reversible counter x {(t) is proportional to the measured frequency. The most convenient way is to choose the value of Ј0 equal to 2P Hz. Then, 1 s, and the code yi (t) is the measured frequency.

During operation of the device, the possibility of simultaneous arrival of pulses at the inputs of a reversible counter, or moments of arrival, is not excluded.

51

the pulses to the counter inputs are slightly shifted relative to each other, which can lead to a malfunction of the reversible counter. To prevent this from happening, the device is equipped with two single vibrators 7, a second shaper of short pulses 6, two elements OR 9 and 10, and countable trigger 11. The length of the pulses generated by the single vibrators is determined by the resolution of the reversible counter (minimum time interval between two signals). As can be seen from the diagram C, the forbidden zones are formed at the output of the first element OR 9, in the middle of which there is a pulse of the driver 6 (diagram U6). This eliminates the impulse coming to the forbidden zones from the output of amplifier 3 to the summing input of counter 12, since the high potential from the output of the first element OR 9 key C is locked and the pulses from the output of amplifier 3 through a counting trigger 11, the pulse former 5 and the second element OR 10 arrive at the summing input of the counter 12 with a delay, the value of which is determined by the resolution of the counter 12 (diagram U5 and U46).

The established value of the frequency code can be fed into the computer of an automated information system.

Thus, a constant code is generated on the output bus of the reversible counter, which is the average frequency of the signal under study, and there is a possibility

Claims (1)

the ability to obtain frequency samples at any arbitrary point in time. Invention Formula Frequency converter in the code containing the reversible counter, generator frequency, key, first OR element, characterized in that, in order to increase the reliability of the device operation by eliminating failures in its operation, a controlled frequency divider is entered into it , amplifier-driver, first and second short-pulse formers, first and second one-shot, second OR element and counting trigger, the output of which is connected to the second input of the second element OR, n through the second short pulse shaper. The first input is connected to the output of the key, and the output is connected to the summing input of the reversible counter, the subtractive input of which is connected to the output of the first one-oscillator, the input of the second one-oscillator and the second input of the first OR element through the first driver of short pulses, and the output bus of the device - with a control bus of a controlled frequency divider, the input of which is connected to the generator output of the reference frequency, and the output - to the input of the first one-vibrator, the output of the second single-vibrator is connected to the first input ervogo OR gate whose output is connected to the control input of the key and the reset input of the flip-flop counting, the clock input of which is connected to the input and output of key -formirovatel amplifier whose input is an input device. t Phie.1