SU1543547A1 - Delta-modulator - Google Patents

Abstract

The invention relates to computing and automation. Its use in adaptive correlation and measurement systems for pattern identification improves the accuracy of a delta modulator and extends its functionality by generating an output PCM signal. The delta-modulator contains a subtractor 1, a generator of 2 clock pulses, a two-level quantizer 3, an approximator 4, a selector of 5 packs of symbols, and a block 6 of level locking. Due to the execution of the approximator 4 on the digital-to-analog converter 7 and the reversible counter 8, and block 6 on the adder 10 and the analog-digital converter 9 with the corresponding connection in the delta modulator, the formation of the delta-modulated and PCM signals is ensured. 2 Il.

Description

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The invention of computer-to-tenbHoft equipment and automation and the model can be used, for example, in Adaptive correlation-measurement systems for identifying patterns.

The purpose of the invention is to increase the accuracy of the delta modulator and expand its functionality by forming an output pulse-i-code-modulated (PCM) signal.

FIG. 1 shows the functional scheme of the delta modulator; on . FIG. 2 - time diagrams of his work.

The delta-modulator contains a subtractor 1, a generator of 2 clock pulses, a two-level quantizer 3, an approximator 4, a selector of 5 packs of Symbols, and a block 6 of level reference. .Proximeter 4 is made on the digital jjioroBOM converter (D / A converter) 7 and a recursive counter 8. The level binding unit 6 is made on an analog-to-digital converter (ADC) 9 and the Torah sum 10.

FIG. 1 also marked the first Second, third and fourth outputs 11-14 delta modulator of the torus.

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The two-level quantizer 3 can be implemented on a trigger.

The selector of 5 packs of characters can be made on the shift register and the equivalence list. The width of the shift register determines the number of single-nakak symbols in a pack, starting with a twist to the distortion of the overload on a slope, is considered unacceptable.

 The delta modulator operates as follows.

The analogue input signal Uey (t) is compared in subtractor 1 with an approximate 45 unambiguous voltage Uannp (t), no- with the output from approximator 4 (Fig. 2a). Differential UBX (t) 40

 Womnp t) is applied to two-pole 9 block 6 and a two-level quantum ADCP

giver 3, controlled by a pulse train of generator 2 (fig. 2b). Using the clock pulses at the quantizer 3, an informative delta sequence is formed (Fig. 2c), which is fed to the first output 11 of the delta modulator. Thus, at the first output 11 of the del-ta modulator, a signal is generated in

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linear delta modulation (LDM) format.

At the same time, the delta sequence (Fig. 2c) is fed to the information input of the approximator 4 and to the input of the selector 5 packs of symbols. In the delta-modulator circuit, the positive polarity of the difference signal corresponds to the signal of the logical unit at the output 11 of the delta-modulator, and negative - to the signal of the logical zero. This sequence is fed to the control input of the reversible counter 8, and as a result of the impact on the clock input of the counter 8 pulses of the generator 2, the counter 8 changes its state — with a positive polarity of the difference signal, the state of the counter 8 increases, and with a negative polarity decreases per unit. The output signal of the counter 8 is fed to the information inputs of the D / A converter 7, the output of which forms the approximating voltage Uaonp (t) proportional to the output signal of the counter 8. Therefore, an increase in the input signal leads to a corresponding increase in the approximating voltage

and a decrease in the U value

UM (t) 6X

Iappr (0. decrease

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(t), i.e. tracking of the approximation signal occurs

for the input signal UB) ((t). The output signal of counter 8 corresponds to the value of the input signal, i.e. at the outputs 13 of the delta modulator, the output signal is generated in the format of pulse code modulation. 1

If the number of identical additional characters (0 or 1) in the output delta sequence exceeds a specified value (for example, 4, as shown in Fig. 2), i.e. the slope of the input signal UB ((t) is greater than or equal to the maximum rate of change of the approximating voltage UQn (t), then at the output of the selector 5 packs of symbols a control signal is formed (Fig. 2d), which is fed to the clock input ANI 9, to the information the input of which receives the difference signal U & x (t) -Uannp (t). The signal from block 5 in block 6 converts the analog difference signal into a code that goes to the inputs of the adder 10, to the other inputs of which the PCM signal is applied counter outputs

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8. Adder 10 provides the summation of the indicated signals, and the result of the summation is recorded in counter 8 on the falling edge of the signal from block 5. Simultaneously, the selector 5 packs of symbols are reset to their initial state. As a result, the output signal of counter 8, corresponding to the output PCM signal, is corrected for a jump value that cannot be processed by a delta modulator with a constant quantization step. At the same time, the value of the adaptation signal is formed at the outputs 12, and the signal at which this adaptation is carried out at the output 14.

Thus, the value of the output signal in the pulse-code modulation format always corresponds to the value of the input signal, which ensures high accuracy of the input signal processing. At the same time, the LDM signal at the second outputs 12 is formed at the singing output 11 — the PCM signal corresponding to the input signal value; at the third and fourth outputs 13 and 14 the adaptation signal of the delta modulator to the change in slope

for) the input signal and the signal by which this adaptation is made.

Claims (1)

Invention Formula A delta modulator containing a reader, the first input of which is the input of the delta modulator, and the output connected to the information input of a two-level quantizer, clock generator, the output of which is connected to the clock input of a two-level quantizer whose output is connected to the information inputs of the approximator .and selector packs of characters and is the first output the delta modulator house, the output of the symbol pack selector is connected to its reset input and to the control input of the level binding unit, the outputs of which are connected to the installation inputs of the approximator, the output of which is connected to the second input of the subtractor, because to increase the accuracy of the delta modulator and expand its functionality by forming an output pulsed-code-modulated signal, is made on an adder and an analog-to-digital converter, the inputs of which are connected to the first inputs of the adder and are the second outputs of a delta modulator, the approximator is made on a digital-analog converter and a reversible counter, the outputs of which are connected to the inputs of the digital-analog converter, the second inputs of the summator The tie-in block and are the third outputs of the delta modulator, the clock input of the analog-digital converter and the outputs of the adder are respectively the control input and outputs block level bindings, the information input of the analog-digital converter is connected to the output of the subtractor, the control and installation inputs of the reversible counter and the output of the digital-analog converter are respectively the information and installation inputs and output of the approximator, the counting input of the reversible counter is combined with the clock input of the symbol packs and connected to the output of the clock generator, the enable input of the record of the reversible counter is connected to the output of the selector set of symbols, which l of a fourth output of the delta modulator. s at .t A I I I I I I I I I J 1 1 II I I I I I I I W uiijjjjjiQAiOTnofnoj.0.0 0JtnoTrn.0 .. P FIG. 2 jrC .t W n