RU1827709C - Digital frequency detector - Google Patents

Abstract

Usage - radio engineering for demodulating frequency-modulated signals. The inventive digital frequency detector comprises a pulse shaper 1, a control unit 2, a pulse generator 3, reversible counters 4, 5, memory blocks 6, 7, a reference voltage source 8, digital-to-analog converters 9, 10, a subtraction block 11, a filter 12 low frequencies. 1 ill.

Description

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Yu

Xi

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Oh Oh

The invention relates to radio engineering and can be used to demodulate frequency modulated signals.

The purpose of the invention is to increase the accuracy of detection by stabilizing the zero point of the discriminatory characteristic.

The drawing shows an electrical structural diagram of a digital frequency detector.

The digital frequency detector comprises a pulse shaper 1, a control unit 2, a pulse generator 3, a first 4 and a second 5 reversible counters, a first 6 and a second 7 memory blocks, a reference voltage source 8, a first 9 and a second 10 digital to analog converters (DACs). a subtraction unit 11, a low pass filter 12.

Digital frequency detector operates as follows.

The input signal is fed to the input of the driver 1, from the output of which the generated pulses are fed to the input of the control unit 2, the other input of which receives the clock pulses of the generator 3, the frequency of which is chosen significantly higher than the frequency of the input signal.

The control unit 2 generates control pulses at its outputs, under the influence of which, during the pulse generated from the input signal period, the contents of the first 4 and second 5 reverse counters are recorded in the first 6 and second 7 memory blocks, as well as the installation of the first 4 and second 5 reversible counters to the initial state, determined by the code at the inputs of their preset. After that, a direct count of clock pulses in the first reversible counter 4 and a countdown of clock pulses in the second reversible counter 5 are performed. With the arrival of the next signal pulse, the contents of the first 4 and second 5 reverse counters are transferred to the first 6 and second 7 memory blocks, signals from the outputs of 9 which respectively enter the inputs of the first 9 and second 10 DACs, where it is converted into analog form and fed to the corresponding inputs of the subtractor. The analog signal from the subtractor through the low-pass filter is fed to the input of the device.

The output signal of the subtraction unit 1 is determined by the expression

UBblx Ul-U2,

(2)

where Ui is the output voltage of the first DAC, and U2 is the output voltage of the second DAC 10. Moreover

u, U2 Uon

2p

2p

N2,

5 where NI and N2 are numbers in the binary code and inputs of the first 9 and second 10 DACs, respectively, Then

10 u.b "-U, It follows that

15UBb, x (Ni-N2)

2P

N2

or

UE

Uon f2f,

2P lf

2f0

rep

where ton is the frequency of the generator 3; fcp is the average frequency of the input signal, fBx is the frequency of the input signal. If the frequency of the input signal is equal to the average expected frequency fBx fcp, then there will be 0.

That is, the output voltage of the detector is zero, both before the appearance of the input signal and when the signal arrives at the average expected frequency.

Claims (1)

The claims A digital frequency detector comprising a pulse shaper connected in series, the input of which is an information input of a digital frequency detector, and a control unit, a low-pass filter, the output of which is the output of a digital frequency detector, a first reversible counter, a control input and a recording input connected in series the initial information of which is connected respectively to the first and second outputs of the block, the first memory block, the control input of which is connected to the third output of the block circuit, and the first digital-to-analog converter, a reference voltage source, the output of which is connected to the reference signal input of the first digital-to-analog converter, and a pulse generator, the output of which is connected to the clock input of the control unit and to the counting input of the first reversible counter, characterized in that, with the purpose of increasing the accuracy of detection by stabilizing the zero point of the discriminatory characteristics, the second reversible counter is connected in series, the counting input and the input for controlling the account and the input for recording the initial information are connected respectively to the output of the pulse generator and to the first and second outputs of the control unit, the second memory unit, the control input of which is connected to the third output of the control unit, the second digital-to-analog converter, the reference signal input of which is connected to the source output 0 the reference voltage, and a subtraction unit, the second input of which is connected to the output of the first digital-to-analog converter, and the output is connected to the input of the low-pass filter, while the inputs of the preset code and the installation inputs to 0 of the first and second reversible counters, as well as the installation inputs to The first and second memory blocks are the control inputs of the digital frequency detector.