SU1531154A1 - Device for conversion of binary sequence to phase-modulated signal - Google Patents

Abstract

The invention relates to instrumentation and computing, in particular to external storage devices of a computer on magnetic tape. The device provides the synchronization of the input data with the frequency of the master oscillator and the encoding of the binary data sequence as a phase-modulated signal. The formation of a phase-modulated signal in the device is carried out using a generator 1 of two clock sequences, an output trigger 2 synchronization and the elements EXCLUSIVE OR 4 and NAND 3. Such a technical solution will improve the reliability of external storage devices and reduce the cost of manufacturing products. 2 Il.

Description

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The invention relates to instrumentation and computing and, in particular, to external computer storage devices. On magnetic tape.

 The purpose of the invention is to improve the device and increase its reliability.

FIG. 1 shows a diagram of the device; in fig. 2 - time diagrams of his work.

The device contains 1 clock pulse generator, synchronization output trigger 2, AND-NOT 3 elements and EXCLUSIVE OR 4, associated with the media and with the input and two output buses.

FIG. 2 shows the input sequence 5 signals arriving at the first input of element 4, two sequences 6 and 7 of clock pulses generated at the outputs of generator 1, the comparison signal 8 generated at the output of element 4, information signal 9 at the output of the AND-HE element 3 and output 10 at forward trigger output 2.

The device works as follows.

The device receives a binary asynchronous signal with respect to the clock signal of the generator 1, a sequence of 5 bits, which compares on element 4 with the signal from trigger 2. The frequency of sequence 7 is the nominal coding frequency, twice the frequency of the clock signals of sequence 6

A device for converting a binary sequence into a phase-modulated signal containing a clock pulse generator and an output trigger, the direct output of which is the first output of the device, and the counting input connected to the first output of the generator, which, for the sake of simplification device and increase its reliability, introduced the element AND-NOT and the element EXCLUSIVE OR, the first input of which is the input of the device, the second

and has a duty cycle of zero. In

the time of action of the low level of the sequential -.- input is connected to the inverse output of output 7 at the output of the AND-NOTKHOD trigger element, and the output is connected

3 a high level signal is generated, according to the first input of the NAND element, entering the information inputs

trigger 2. At the time when

the rear edge of the clock signal is the generator's next output, and the output of sequence 6 coincides with the high I-NOT signal connected to the two information tools on the information inputs with the trigger inputs of the output trigger.

A swarm whose input is the second output of the device and is connected to the second

about

five

2, the forward output of the trigger forms the main difference of the output phase-modulated signal 10.

During a high level sequence 7, the result of comparing the current state of trigger 2 with the signal of input sequence 5 on element 4 enters the information inputs of trigger 2 and enables or disables the trigger in counting mode.

If the current state of flip-flop 2 at its inverse output differs from the level of the input sequence 5, flip-flop 2 changes its state to the opposite at the instant of the falling edge of the clock signal of sequence 6, i.e. an additional differential of the output signal 10 is formed at its direct output. Otherwise, no additional differential is formed.

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Claims (1)

25 claims 0 A device for converting a binary sequence into a phase-modulated signal, comprising a clock generator and an output trigger, the direct output of which is the first output of the device, and the counting input connected to the first output of the generator, characterized in order to simplify the device and improve its reliability, an AND-NOT element and an EXCLUSIVE OR element are introduced, the first input of which is the input of the device, the second to the first input of the element is NOT, the second input of which is the second output of the device and is connected to the second