SU1531135A1 - Method and apparatus for compensation of phase shifts in multichannel reproduction of information - Google Patents

Abstract

The invention relates to a magnetic recording technique, in particular, to methods and devices for reproducing digital information from multi-track magnetic waveforms, and allows increasing the reliability of reproduced information and extending functionality by eliminating information loss by compensating phase shifts exceeding the information follow-up period. For this, when grouping information, each line is divided into several interconnected groups, for each of which synchro-pulses are synthesized, by which the reproduced information is gradually aligned both within the groups and the line as a whole, with the number of channels both in the line and in the groups must be odd. The last channel of each group is the first channel of the subsequent group. The sync pulses are synthesized by multiplying the sync frequency by N times and then dividing it by the same N times with additional synchronization of the information signals of each group in each row. The grouped information is gradually aligned with the help of several register groups controlled by synthesized clock pulses. The phase shift compensation device contains an information alignment block that includes N serially connected registers, a normalized pulse shaper, containing K circuits And and a one-shot, as well as a frequency multiplier and a frequency synthesizer that includes an even-channel synthesizer from the 2nd to (K-1) - go and synthesizer of odd channels from 3rd to (K-2) -th. 2 sp.f-ly, 15 Il.

Description

The invention relates to a technique of magnetic recording, in particular, to methods and devices for reproducing digital information from multi-track magnetic recordings.

The purpose of the invention is to increase the reliability of reproducible information and enhance functionality by eliminating information loss by compensating phase shifts in excess of the period of information following.

Method for compensating phase shifts in multi-channel playback

315

The Research Institute of Information and the device for implementing this method are illustrated in the drawings.

FIG. 1 shows the channel grouping scheme in the information line; Fig. 2 is a block diagram of the formation of synthesized sync pulses; ng FIG. 3 — timing diagrams for synthesizing sync pulses; in fig. k is a block diagram of the alignment of information in a group; in fig. 5 - time-alignment information in rpvnne; FIG. 6 is a diagram of the grouping and phased alignment of information; in fig. 7 is a functional diagram of a device for compensating phase shifts in multi-channel reproduction of information implementing a method; in fig. 8 is a functional diagram of an even channel synthesizer; Fig, 9 is a functional diagram of an odd-channel synthesizer; in fig. 10 is a scheme for grouping information with an even and an odd number of channels of information lines; in fig. 11 - time diagrams of the operation of the even channels synthesizer; in fig. 12 - time diagrams of the operation of the synthesis of odd channels; in fig. 13 timing charts aligning information with an odd number of groups; FIGS. are timing charts of information alignment with an even number of groups; Fig. 15 shows timing diagrams of alignment of information with an even number of groups (continuation of timing diagrams).

In the invention, the compensation of the basic shifts is provided by a number of sync signal conversions and a sequence of logical operations associated with the phased alignment of the grouped information.

For this purpose, a conditional breakdown of a given set of information channels in a line into several interconnected groups (channel grouping) is carried out so that the last channel of one group is the first channel of the next group; synthesizing clock pulses in each group and for each stage of alignment of reproducible information; gradual alignment of the reproduced information with the use of register groups controlled by synthesized clock pulses.

1354

Channel grouping. To implement the method, it is necessary to condition all K channels of reproduced information into several groups consisting of m channels in each group. The channel of clock pulses (si), as the most important, it is advisable to place in the center of the line,

Q To ensure symmetry with respect to the SI channel and the same information transmission conditions, the total number of channels (synchronization and information) should be odd.

 For convenience of conversions, with an even number of channels, one channel is conventionally added to them.

In order to ensure interconnection between groups, the line should be split with overlapping — the last channel of one group simultaneously enters the group following it as the first channel, forming a connecting link between the groups.

5 With a breakdown shown in FIG. 1 lines into groups of channels of 3, an odd number of channels, Kc is divided without remainder, and to fill the last group in a line with an even number of channels K c of one channel is missing, it is added conditionally (in Fig. 1d, d is shown by a dotted line). In all cases, the SI channel is located in the center of the line. Moreover, for the case of an odd number of groups N (Fig. 16,

5 d) the SI channel is located in the center of the linking central group, and for the case of an even number of N groups (Fig. 1c, e) the SI channel is a link for two groups that have

with in the center of the line.

Thus, when m channels are grouped out of their total number k in a row, one of them is central and information is then aligned, and the remaining channels are arranged symmetrically to it. In addition, due to the overlap of groups with one common

A channel creates a chain of interrelated channel groups converging to the center of the line.

The division into groups allows you to further produce ordered

gradual alignment of information within a small number of channels using sync signals generated with reference to information 153

impulses of the channels acting as central ones.

The principle of formation of the synthesized clock pulses.

An automatic analysis of the position of information pulses or the limits of bits of the studied channel group is performed with a predetermined predetermined discreteness of higher frequency (than reproducible sync pulses) clock signals obtained by multiplying the frequency F-, reproduced

AND

sync pulses by 2 times - F; - 2; Frequency multiplication by 2 times is possible

considered as the 1st stage of synthesis.

Binding of high-frequency clock pulses to information pulses is performed at a subsequent second stage when high-frequency signals 8 are divided in the same ratio 2, for example, using a counter, additionally synchronized by information pulses.

FIG. Figure 2 shows a block diagram of the formation of synthesized sync pulses (FID) from sync pulses (c) reproduced from a magnetic tape, and information pulses (AI).

FIG. Figure 3 shows synthesis diagrams for example.

h

SI in 2

h

cases of multiplication and division times, where 2 8.

After multiplying the SI (Fig. 3a) by 2 times, we obtain a sequence of high frequency pulses - SI VC (Fig. 36), which goes to the divider (Fig. 2) with a division factor of 2 8. The AI also receives the same divider (Fig. Sound), which additionally synchronize it. If there is no AI, the divider operates in the counter mode, ensuring the formation of time intervals after 4 pulses. According to one of the differentials (Fig. 3g), the FID (Fig. Zd) are formed so that they are located with a shift by half the period of the information impulses, the other FDD (Fig. Ze) can be formed, coinciding with the AI.

Synthesizing accuracy in prep

Half period equal to

those. determined by the multiplication factor (2) of the SI frequency.

tota

The promem is specified by a higher hour (after multiplying) it defines feu as

vm

CU

where f

- frequency reproducible

sync pulses.

The synthesis of FID from high-frequency pulses can be performed for any information channel using a splitter (counter), additionally synchronized by information pulses of this channel. Since the synthesis of

frequency division

64

on that

same coefficient 2, then the frequency of the FID

f f 7

F -. g stsc 2 2

By absolute frequency values

and P, -c are equal (TC

 T

ecu

) but fi

25

thirty

35

40

45

50

55

Zically, in time, the SI and the FID are shifted with respect to each other by a part of the period T, equal to the phase shift for this group of channels.

Thus, to ensure the synthesis of clock pulses, it is necessary to multiply the frequency of the reproduced clock signals, obtain higher-frequency clock signals, and then divide the received frequency by the same number of times, ensuring that the beginning of the division is tied to the information bits of the analyzed channel or group of channels.

The alignment of the reproduced information is carried out in several stages: the alignment of the information of each group using. The central channel of the group; sequential transfer of information from the register to the register and alignment of information between groups.

As already noted, the set of channels k in the information line (Fig. 1) should be divided into groups consisting of an odd number of channels (in the most optimal variant of the channels), among which there are one central and two or several extreme channels. The synthesis of new sync pulses for a small group of channels is carried out through its central information channel, which strictly determines the location of the FID.

For the method at the first stage, a difference is used in the middle of the information period. This makes it possible, using register schemes, to expect the Mi-i formation during a half-period, and then read it using the FID of this group. Taking into account that the whole line is covered by grouping and synthesizing clock pulses, on the first BOM rjTane, information is aligned simultaneously in all groups of this line.

At the same time, we note that with this method, the outermost channels of the line do not participate in synthesizing sync pulses, which allows you to place information on them that rarely appears, or information with a long series of data. It is advisable to make the alignment sy 1 metric, approaching the center of the line, i.e. to the sync channel.

An example of alignment of conditional information in a group of three channels using a register (FIG.) Is shown in the time diagrams of FIG. 5. The information pulses of the three channels (fig., B, c) are presented in a randomly selected code with a phase shift y, (fig. 5a, b, c) of the extreme channels with respect to the central (z-th channel). The phase shift of these channels within the group is usually much less than the period T.

As already noted, the synthesis of sync pulses is carried out with reference to the central (2nd) channel, and the resulting FID (Fig. 5d) are shifted relative to the AI of this channel by half a period. Information pulses are entered into a register, which, after gating the FID (Fig. 4d), produces the phased information of all channels (Fig. 5e, e "). From the diagrams presented, it can be seen that the phase shift can reach half the period.

Similar alignment is performed for all channel groups of a row. For example, for an arbitrarily selected line (Fig. 6a), 1, 2 and 3 channels are the 1st group, 3, 5 channels, the 2nd group, 11, 10 and 9 channels - 3 group th, 9th, 8th and 7th channels - th group, and 5th, 6th and 7th channels - the 5th central group. FIG. 6 schematically shows the grouping and movement of information. In the end, after the first

five

0

five

five

0

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0

five

0

During the information alignment stage, a new intermediate line is formed (Fig. 66), consisting of groups of channels, in which one of the channels is present in two adjacent groups and is a link, and the channels of the central group (C) connect the upper and lower parts of the line .

The subsequent phased alignment provides for the alternate formation of new groups (Fig. 6c, d, g, i) and the creation of new FID for each channel through which the synthesis is synthesized and phased transfer of information (Fig. 6d, f, g, k).

Presented in FIG. 6 of the diagram, it can be seen that at the first stage (Fig. 6a, b) information is transferred via the FID of the central (even) channels (2, 4, 6, 8, 10) groups.

In the second stage (Fig. 6c, d), information is transferred using the FID of odd channels (3, 5, 7 and 9) groups.

Extreme channels (shown in Fig. 6 by a dotted line), after alignment, do not participate in synthesizing and are transferred automatically with the channels of the formed group.

In the third stage (Fig. 6 d, e), information is transferred again through even channels, but by fewer (6 and 8), since several extreme channels on both sides of the line were aligned at the previous stage.

At the fourth stage (Fig. 6, h, h) information transfer is performed on a smaller number of FID odd (5 and 7) channels.

At the last fifth stage (Fig. 6 and, k) the transfer is carried out by pulses of the central (6) channel line, i.e. using SI. At the same time, at each stage of the alignment and transfer of information (using the FID), along with a decrease in the number of groups, the temporal mismatches between the channels are reduced by one.

In this way, the adjustment is performed until all channels are grouped around the SI.

The number of alignment stages is always equal to the number of N groups, and the total compensated phase shift between the extreme channels can reach

G;

where is the shift between the channels in the group

ne; N - the number of groups in the line.

Thus, the chain of successive transformations associated with the grouping of information, its gradual alignment within groups and between groups using synthesized clock pulses, aligns the phases of all the channel lines, where the extreme groups of channels form the initial links, and their convergence is to the middle of the line, i.e. to the SI channel. In this case, self-synchronization by synthesized sync pulses and reduction of time intervals (shifts) between groups is gradually made on all channels.

The phase shift compensation device for multichannel information reproduction (Fig. 7), the implementing method, contains information alignment unit 1, shaper 2 normalized pulses, frequency synthesizing unit 3, and frequency multiplier 4.

Block 1 of the alignment of information contains the first to the N-th registers 5-8, respectively.

Shaper 2 normalized pulses contains a circuit And 9, the circuit And 10, the circuit Itz 11 and the one-shot 12.

The frequency synthesizing unit 3 contains a synthesizer of 13 even channels and a synthesizer 1 of odd channels.

The 13 even channel synthesizer contains the synthesizer 15 of the 2nd channel, the synthesizer 16 of the 4th channel and the synthesizer of the 17th (K-1) -th channel, which include dividers 18–1–18–3 frequencies, shapers 19–1–19 -3 FID and shapers 20-1 - 20-3 pulse reset.

The synthesizer 1 of odd channels contains synthesizer 21 of the 3rd channel, synthesizer 22 of the 5th channel and synthesizer of the 23 (K-2) -th channel, including dividers 24–1–24–3 frequencies and drivers 25–1–25-3 SSI .

Device compensation phase shifts in multi-channel playback of information works as follows.

with

g 5 0

5 o

,

five

The proposed device should provide the grouping of information channels, the synthesis of sync pulses and the gradual alignment of the reproduced information.

Multichannel code information and sync pulses are received from the input bus through K channels to the input of the device (Fig. 7). The information is simultaneously recorded in the information alignment unit 1 and in the frequency synthesis unit 3, and the sync pulses go to the frequency synthesis unit 3, either directly or through the 4 frequency multiplier.

Controlled by block 3 frequency synthesis unit 1 alignment of information distributes grouped information to shaper 2 normalized pulses, where gating occurs using the SI and output to the device output.

The information arriving at the input of the device is represented as lines (Fig. 10). The number of channels in a line must be odd and the sync pulses (c) must be located in the middle of the line. For an even number of channels, the line (Fig. 10a) is conditionally supplemented with one extreme channel (shown by a dotted line), which ensures the symmetry of information with respect to the SI and the convenience of grouping.

When grouping by 3 channels in any line of an odd number of channels, N groups can be formed, which in turn can be odd (Fig. 1 Oa, N 3) or even (Fig. 105, N A). The number of groups determines the number of registers and, hence, the number of alignment steps. For example, to transmit the information shown in FIG. 1Oa (6-7 channels), the device will require three registers, for

the information in FIG. 106 (9 channels) - four registers, and for the general case (k channels), represented in the device in FIG. 7, N registers 5-8 are required.

Since when aligning information using the previously described method, the central channel of each group is used to synthesize SI, then at the first and subsequent at each odd leveling stage all even channels act as central channels (2, C, 6, ..., K- 1), and at the second (and every even) alignment stage, odd channels start as central channels, starting with (3, 5, .... K-2).

In connection with it, the device has a synthesizer of 13 even channels and a synthesizer I t of odd channels, combined in frequency synthesizing unit 3. The inputs of the synthesizers 13 and, the number of which is equal to the number of channels, receive the same information as in block 1 of the alignment of information.

The SI following period usually defines the limits of the information bits, and for the case of the absence of phase shifts between the channels, and the line boundaries. But since basic shifts are almost always present in the information line, the infoomatsi, especially of the extreme channels, can go beyond the bounds of the SI follow-up period. Therefore, in the proposed device, the creation of the SI for each information channel is set and implemented, which will help to clearly define the boundaries of the information bits and its reliable reproduction in the line.

This is achieved as follows.

SI with frequency F ,, (Fig. 7) is fed to the input of a frequency multiplier, for example, from n discrete multipliers by 2. Where they are converted to higher frequency clock pulses by SI CPU multiplied by 2. Typically, sufficient accuracy is achieved with three - or four-step multiplication, i.e. when n 3 or n 4.

As a result, the output of the frequency multiplier k is a sequence SI g, with frequency F. 2

 64

The frequency multiplied by 2 times goes to the synthesizers of even 13 and odd I channels of the frequency synthesizing unit 3.

At the same time (FIGS. 8 and 9), the control inputs of each channel 15-17 of the synthesizer 13 even channels and each channel 21-23 of the synthesizer I of the odd channels receive information pulses (AI) of the corresponding channel.

So, with the total number of channels K, for the synthesizer there are 13 even channels

The number of control information inputs and synthesizers is determined by the number of even values from 2 to K-1, and for synthesizer 1 odd channels - the number of odd values from 3 to K-2. The diagrams of the operation of synthesizers of even channels, taking into account the multiplication of the SI frequency, are presented in FIG.

The even channel information (Fig. 11a) and the SI with the period T. (Fig. 116) have a phase shift J, and do not coincide with each other. After multiplying the FCI by 2 16 half-names, the sequence AND gq is shown in FIG. 11c and has a very short period.

T

ech

n0

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five

The SIC (and the AI arrive at the frequency divider 18 (Fig. 8), made, for example, in the form of a counter by 1b, where the frequency of feu is divided by 2 (Fig. 11 g), by 4 (Fig. D), by 8 ( Fig. Pe), at 16 (Fig. 11i). The division of the frequency fg starts from the moment of additional synchronization of the dividers 18 (Fig. 8) by information pulses (AI) (Fig. 11a) of even channels that reset the counters to zero. AI is equal to SI frequency ((t - s (1) O fronts of newly formed pulse sequences I, - I4 (Fig. 11d, d, e, g) coincide with the fronts of AI (Fig. 11a). And even if the AI in which or One or several lines will be missing after counting a predetermined number of pulses, for example 1b pulses, one of the edges after the last division (Fig. 11g) is used to extract a pulse (Fig. 11z), indicating the possible location of the AI or the border. bit of information.

These newly generated pulses (Fig. Pz) are the synthesized sync pulses (FID) of the channel whose pulses were controlled by a divider (counter).

On the falling edge of the FID (Fig. 11z), the reset pulses (Fig. 11 and) are used, which are used to control the first register 5 (Fig. 7) of the information aligning unit 1.

The diagram of the synthesizers 21 - 23 synthesizer I odd channels

 15

taking into account the frequency multiplication, the SI is shown in FIG. 12. The information of the odd channel (Fig. 12a) and the multiplied SI frequency gc, (Fig. 12c) are transmitted to frequency divider 2 (Fig. 9), made, for example, also in the form of a counter, where frequency division ff occurs by 2 (Fig. 12d), on k (Fig. 12d), on 8 (Fig. 12e), on 1b (Fig. 12g). ,

The frequency division fg starts from the moment of additional synchronization of the dividers 2 frequencies (Fig. 9) by information pulses (AI) of odd channels (Fig. 12a), which reset the counters to zero or maintain a zero state.

On the front of the output signal of the divider (Fig. 12g), the synthesized odd-channel clock pulses (Fig. 12z) are generated with the help of the FID 25 formers.

Since the SI synthesis and alignment of information is performed alternately either on even or odd channel groups and in order to exclude simultaneous operation of synthesizer groups, and hence the device operation uncertainty, the FID selection (Fig. Pz) of even channels is produced by a positive difference the output voltage (fig.11g frequency divider, and the selection of the FID (fig. 12z) of odd channels) by the negative difference of the output voltage (fig. 12g) the frequency divider that provides a fixed phase shift between of FID by a half pulse repetition.

Taking into account the fact that the DFIs of even channels are shifted by half the period of information following, then the first input register 5 of the information aligning unit 1 is controlled by the DFI of these channels.

Thus, using synthesizers 13 and I frequencies, sequences of sync pulses are formed for any of the information channels with strict mutual phasing of AI and FIC, and this solves the problem of faithful reproduction of information.

The further process of (direct) alignment of the reproduced information will be considered with the help of voltage diagrams for odd (Fig. 13) and even (Fig. 15) number of groups of channels.

1D

A line of information consisting, for example, of 6 channels (Fig. 10a), after the conditional addition of the 7th channel is divided into interconnected groups (N 3).

The even (2, k, 6) and odd (3 and 5) channels are determined by which the frequencies are synthesized.

Several randomly selected lines of information are shown in FIG. 13a. The SI channel is located in the middle of the line. The phase shift (line slope) between the outermost channels is significantly longer than the period of the SI following. You can determine its acceptable level

L N T (1

st

(1 -), 6 T.

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The multiplied sequence of clock pulses is shown in FIG. 136. With their help, as described earlier, the FID of even (Fig. 13c) and odd (Fig. 13d) channels are formed. In this case, the FID of each even channel is located in the middle of the period of the corresponding information bit, and the FID of the odd channels coincide with the boundaries of the period of the corresponding information bits.

The reproducible information (Fig. 13a) is entered per channel into the 1st (input) register 5 (Fig. 7) of information alignment block 1, where it is stored (Fig. 13e) until the FID of even channels is received. In this case, the leading edge of the FID of the 2nd channel provides for the transfer of information from the 1st to the 3rd channel in the II register (Fig. 13e), and the leading edge of the FID of the 6th channel provides for the transfer of information and the 6th channel to the same 11- The first register of the FID channel, which is the same SI, but shifted by half a period, does not participate in the transfer of information at this stage.

The reset pulses formed on the back edges of the FID of even channels (not shown in Fig. 13) reset the T-th register (Fig. 13e) to the initial state. By the same principle as the transfer of information was carried out, the reset pulses of the FID of the 2nd channel (Fig. 13c) reset 1-3 channels of the 1st register, and the FID of the 6th channel are set to zero 5 and 6 channels. FIG. 1e also noticeably fron

You have less information potential discrepancies than in the T th register and in the input information.

Then, when the potential of 1–3 channels of the 11th register coincides (Fig. 13e) and the FID C, then the (odd) channel (Fig. 13d) transmits the information to 1- ;. channels of the 111th register (Fig. 13) k), and if the potentials of the 5th and 6th channels of the 11th register and the DIB channel coincide, the information is transferred to the 5th and 6th channels of the 111th register. There was also a reduction in mismatch between the fronts.

The information channels of the 11th register (Fig. 13e) are reset at the boundaries of the FID periods of the even channels at the zero state of the corresponding channels of the T-th register. The information channels of the 111th register (Fig. 13g) are reset to the zero state at the borders of the FID of odd channels, but already in the absence of the information sign of the corresponding channel of the 11th register.

At the last stage, the states of the last register are deciphered using And 9-11 circuits of the former 2 normalized pulses (Fig. /). These circuits And are gated with one-foil 12 pulses, which coincide in phase with the half-period shifted SI, and may have a difference with them in duration.

The coincidence of the output potentials of the hp and the third (third) register with the pulses of the one-shot 12 (converted b) provides the output of the information from the AND 9-11 circuits (Fig. 13h). As can be seen from the diagrams (Fig. 13a, h), the code information of the output line corresponds to the input information with the same period, but without phase shifts, and its output is delayed by three half periods, which corresponds to the number of information transfers (N 3) multiplied by the duration

half period (-).

Thus, information is aligned, the phase shift by pulses of the extreme channels of which significantly exceeds the period of their passage.

For a string consisting of an even number of groups, for example for N 4

ten

15

1531135 b

(Fig. 106), the alignment process proceeds in a similar pattern. Fu | -1K-rational connections of the device (Fig. 7) do not change, only the number of functional units changes, the copy of the involved registers in the information alignment block 1 is equal to the number of groups, i.e. four. The number of circuits involved And in the driver 2 normalized pulses is equal to the number of information channels (without SI), i.e. eight.

The number of synthesizers of even channels is four (2, A, 6 and 8 channels), odd channels - three (3, 5, 7 channels).

Extreme channels, as in all cases, do not participate in the synthesis.

In this case, the SI channel is odd in the row and the common link for two neighboring groups, and therefore, when synthesizing, it is not necessary to shift the SI. In this case, the SI, in addition to arriving at the frequency multiplier k (Fig. 7), can be fed through the frequency synthesizing unit 3 directly to the one-oscillator 12 of the driver 2 of the normalized 2Q pulses.

Consider an example of alignment of information represented in the form of several lines in arbitrary coding in FIG. . The slope of the lines is also chosen arbitrarily, but in a different direction, with respect to the alignment example previously considered. The phase shift between the pulses of the extreme channels is much longer than the period.

Four groups in the information line assume the presence in block 1 of the alignment of information (Fig. 7) of four registers. By multiplying the SI frequency by 2 (p 4), we obtain a sequence of SI pulses gt, (Fig. Yb)

20

25

35

40

45

50

with period j that defines

error of synthesis and alignment of information. In this case, the permissible phase loss can be

At N.T (1 - 7, -) 4.T (1 - i)

55 3.5T.

As in the previous example, from SI cc with the help of input information pulses (fig. L4a) in block 3.

with period j that defines

error of synthesis and alignment of information. In this case, the permissible phase loss can be

At N.T (1 - 7, -) 4.T (1 - i)

55 3.5T.

As in the previous example, from CI, using pulses of input information (Fig. L4a) in block 3. Frequency synthesis (Fig. 7), the sequences of the FID of the even channels (Fig. C) and the FID of the odd channels (Fig.) Are formed, The FID of the even channels are located in the middle of the bit of the corresponding information channel, and the FID of the odd channels coincide with the boundaries of the information bits of the pulses of the corresponding channel. In this case, the input clock pulses through the synthesizer are not necessary, although for the case of loss (loss) of the SI, this operation is necessary and facilitates the transmission of information with greater reliability. And in this case, the information on the bus, the information input (Fig. 7) is simultaneously entered into the 1st register 5 of the information alignment block 1 and into the synthesis block 3

Each channel of the 1st register 5 (Fig. TJA) maintains its state until the arrival of the FID of the even channels. So, the 2nd channel FID transfers information of 1-3 channels to the second register (Fig. Ye), and then with the help of reset pulses formed on the falling front of the PID of its even channel (not shown in Fig. And), all three channel 1 (input) register 5 to its original state; The 8th channel FID transfers information of 9, B and 7 channels to the second register, and then using reset pulses generated on the falling edge of the 8th channel FID, sets these channels of the 1st register to the initial state.

Similar processes occur during the transfer of C-6 channel information from the 1st register to the second. The information of the k-ro and 6th channels is only shifted by half a period together with all the information.

Using the FID of the odd channels, the information from the 2nd register is transferred per channel to the 111th register (Fig. In this case, the 3rd channel FID transfers information of 1-4 channels, channel FID 7 is information of 9-6 channels.

Further consideration of the operation of the device is performed using the time diagrams of FIG. 15, to which the voltage diagrams of the FID and the 111th register of FIG. I. At the fourth stage of alignment, the information of the 111th register (Fig. 15g) is transferred to the 111th register (Fig. 15z).

again using the DID of even channels: the upper part of the line (-k channels) - using the DIH channel, the bottom of the line (9-6 channels) - using the DI6 channel.

After this, the state of the last 111th rgister (Fig. 15z) is decrypted using AND 9-11 schemes (Fig. 7),

Q gated pulses of one-shot 12 shaper 2 normalized pulses. (The pulses of the one-shot 12 are generated from the 5-channel CW pulses and due to their mutual coincidence

5 is not shown on the voltage plots in time).

When the unit states of the corresponding channels of the IV register register (fig.) Coincide with the pulses of the one-channel torus 12 (SR of the 5th channel), information units are formed at the output of the device (fig. 15a), and when strobing the AND decrypting the opposite state IV-ro register, they

5 confirms the zero status information.

Since gating is performed using SI on all channels at the same time, at the output of the driver

The Q 2 normalized pulses of the device (Fig. 7) are formed in the form of strings of phase-aligned pulse sequences (Fig. 15i).

As can be seen from the diagrams, the information at the output of the device (Fig. 15 and) corresponds to the input (Fig. A) information, but has a delay in time by the number of half-periods, multiple to the number of information transfers, i.e. with N 4, the information delay is two periods (2T).

As a result, and for another example with a different slope of the information lines, the device provides information alignment, compensating for phase shifts between channels.

Thus, regardless of the direction of the phase shifts,

alignment of information during multichannel reproduction, which excludes possible losses, increases the reliability of reproduction, allows to provide (without additional

adjustment) interchangeability of magnetic tapes and magnetic heads, expands the functionality of magnetic recording equipment as a whole.

nineteen

Claims (2)

1. A method for compensating phase shifts during multi-channel reproduction of information, including grouping and storing information of each line reproduced from different MarHMTHovi tracks of the waveforms, characterized in that In order to increase the reliability of the reproduced information and enhance the functionality by eliminating information loss by compensating phase shifts exceeding the information follow-up period, when grouping information, each line is divided into several interconnected groups, for each of which synchro pulses are synthesized, in which the reproducible information both within the groups and the line as a whole, and the number of channels both in the line and in the groups should be odd, The last information channel of each group is the first channel of the subsequent group, thus forming groups in each row from the extreme channels to the center of the line, which is a sync channel, sync pulses are synthesized by multiplying the sync frequency by n times and then dividing it by the same n times with additional synchronization information signals of each group in each row, and grouped information is gradually aligned with the help of several register groups controlled by synthesized sync pulses. 2. A device for compensating phase shifts in case of multichannel reproduction of information, which contains an information leveling unit connected in series with it a normalized pulse shaper, including ten 15 153P3520 And, the number of which corresponds to the number of information - cash, and the one-shot, the output of which | This is connected to the gating inputs of the AND schemes, characterized in that, in order to increase the reliability of reproducible information and enhance functionality by eliminating information loss by compensating phase shifts exceeding the information follow-up period, a serially connected frequency multiplier and a frequency synthesizing unit including a synthesizer are introduced even channels from the 2nd to {K-1) -th and synthesizer of odd channels from to (K-2) -th, the control inputs of which, like the inputs of the information equalization block , are connected to the information input bus, and the synthesizer of each channel contains serially connected frequency divider and shaper of synthesized sync pulses, to the output of which on the even channels channel synthesizer, a reset pulse shaper is connected, the information equalization unit consists of sequentially connected N registers, the number of which corresponds to the number alignment stages, the control inputs of each register alternately in accordance with their parity are connected to the outputs of the corresponding Intiators of even and odd channels, in addition, the synchronization input of the frequency multiplier and the second input of the frequency synthesizing unit are connected to the input of the information input bus clock, and the output of the frequency synthesizing unit is connected to the input of the single-oscillator of the normalized pulse former, and the outputs of the normalized pulse generator impulses vnut-with a device exit. 20 25 thirty 35 40 „45 „45 T rawa / f I KOHO / f. I -KOHOA cu I x N. IKg channel h tfft / rt ff "1PLSh1 and 1Sh | L ; Uuu Idel UKU U. CCM k Figg P Jl. M Ztl Th / .5 g kifSi An FID (2k) d 2k P J / r eleven Fa9.CH P I UJufia GG I imsrorm RK / J H / 4 NN (r. ;; g ftZF t (K Tire vmod Inforp / /  7 1 cano AG "7 / Y7X fiye.9  Kona A to kana / 1 FIG. ten H ( h, SHL4 1ЯГ1ЯПЛ / | ЛЛЛЛJJ fa Well Sep yearn.KOtf. UcSp. H tchg ifrn , Ollt shhhh pll and Lru flty mgum fOff ( | H AND ffw Jl P Jl "" “V. M 7dg TNL Sf Wl S / c Jl P ut.ff