SU652718A1 - Multichannel system for binary information transmission with time-division multiplexing - Google Patents

Description

The invention relates to a technique for transmitting discrete signals and can be used in telegraphy, data transmission and telemechanics. A known multichannel system for transmitting binary information with a temporary compression, containing matching blocks with a line, is connected to the corresponding inputs and outputs by a switch, one input of which is combined with one input of the converter and connected to the output of a clock generator. However, for the secondary compaction of plesiochronous signals in a known system, a significant number of telephone (TLF) channels are required. The aim of the invention is to reduce the number of TLF channels used for the secondary compression of plesiochronous signals. To do this, a multichannel binary information transfer system with a time seal, containing matching blocks with a line, connected by corresponding inputs and outputs to a switch, one input of which is combined with one in the converter stroke and connected to the output of a clock generator, serially connected shaper, matching block speeds and phase adjustment unit frequency. Moreover, another input, the converter, is connected to one output of the rate matching unit, and the outputs are connected to the corresponding inputs of the drivers and the speed matching unit, the other output of which is connected to the corresponding inputs of the matching unit with a line, the switch is connected to the basic frequency tuning unit and the corresponding input of the matching unit speeds, while the output of the clock pulse generator is connected to the corresponding inputs of the speed matching unit, phase adjustment unit and formati l The drawing shows the structural electrical circuit of the proposed system 1. The input low-speed signals are not available through the blocks 1 matching with the line to the switch 2, which also receives a signal from blocks 1, characterizing the speed of this low-speed channel. The switch, in accordance with the address that is being triggered at its input from the clock pulse generator (GTI) 3, connects to the corresponding output the information of the low-speed channel to which the address has been assigned. Similar operations are performed by the switch and with control signals.

Divided in In time, the information and control signals of the low-speed channels are passed to the input of the group unit 4 of the phase control frequency, which performs phasing on the elements (search for the center of the transmission) for each low-speed channel. The search for the center of a parcel in each low-speed channel is performed by the same algorithm separately in time. The synchronization of block 4 is performed by address signals from the GTI 3. The pulses corresponding to the centers of the parcel from block 4 enter the block of matching 5 speeds. At the same time, low-speed channel information flows from switch 2 to the matching unit. This information is recorded in the corresponding memory cells of each channel of the matching unit at the time points determined by the pulses of the sending centers.

 Block 5 performs the matching of the speeds of low-speed channels with the speed of transmission in the group path. The rate matching algorithm is one for all low-speed channels. The processing of information in the matching unit is conducted for each low-speed channel at time intervals corresponding to the given channel, according to the address signals from the GTI 3. In addition, the matching unit generates signals characterizing the degree of memory filling of each low-speed channel that goes to the driver 6. The degree of filling determines the direction of the divergence of the speeds of a given low speed channel with a transmission speed in the group path. The driver generates the appropriate combination for transmission over the service channel. This combination enters the matching unit. The processing of information in the driver for each channel is also performed at the time intervals corresponding to that channel using signals from the GTI 3.

From the matching unit 5, the information is read into the converter 7. This process is synchronized by signals from the converter corresponding to the transmission times of the low-speed channel in the group path. The converter is designed to synchronize information of low-speed channels during transmission over a group path.

In receive mode, the system works as follows.

Received and synchronized information comes from converter 7 to the input of matching unit 5. In addition, signals from the converter to the matching unit and shaper b are received corresponding to the moments of recording information of each low-speed channel from the group signal. To these signals, low-speed channel information is recorded in the cells of the matching unit assigned to each channel. Combination, accepted by. service channel, comes from the matching unit in the driver 6,

which, analyzes the received combination, determines the direction of the velocity divergence and generates the appropriate control signals to the matching unit.

Information of low-speed channels to be read comes from matching block 5 to blocks 1 in accordance with the address signals from GTI 3. Simultaneously with the information from matching blocks to block 4, signals are received that characterize the degree of memory filling in the low-speed channel corresponding to this time interval. In accordance with the degree of filling, block 4 performs a change in the speed of reading information in each low-speed channel. The information is read into blocks 1 by synchronization signals from block 4 through switch 2.

The use of the proposed system in transmitting plesiochronous data signals allows a significant increase in the efficiency of use of the communication channel.

Claims (1)

Invention Formula Multichannel system for transmitting binary information with a temporary seal, containing matching units with a line connected by respective inputs and outputs to a switch, one input of which is combined with one input of a converter and connected to the output of a clock generator, characterized in that in order to reduce the number of telephone channels used for the secondary compression of plesiochronous signals, a sequentially connected driver, a rate matching unit, and a phase adjustment unit, the other input of the converter is connected to one output of the speed matching unit, and the outputs are connected to the corresponding inputs of the driver and the speed matching unit, the other output of which is connected to the corresponding inputs of the line matching blocks, the switch is connected to the frequency phase adjustment unit and corresponding input block matching speeds, while the output of the clock pulse generator is connected to the corresponding inputs of the speed matching unit, the phase adjustment unit and the driver.