SU1483609A1 - Device for oscillatory circuit tuning - Google Patents

Abstract

The invention relates to radio engineering. The purpose of the invention is to improve the accuracy of the setting. The device for automatic tuning of the oscillating circuit contains an oscillating circuit 1 on an uncontrollable 2 and a discrete controlled 3 electrons, r-r 4 clock pulses, amplitude detector 5, ADC 6, memory register 7, comparison block 8 codes, EL-T OR 9, shift register 10, trigger 11, control key 12, counter 13 and reversible counter 14. The tuning accuracy of oscillatory circuit 1 is enhanced by using digital circuits in the device: ADC 6, registers 7 and 10, comparison unit 8, ele- that OR 9 and trigger 11. 1 Il.

Description

The invention relates to radio engineering and can be used for automatic tuning of resonant circuits and matching devices of radio transmitters having an amplitude-frequency characteristic with one maximum.

The purpose of the invention is to increase the accuracy of the settings.

The drawing shows an electrical block diagram of a device for automatic tuning of the oscillatory circuit.

Device. For automatic tuning of the oscillatory circuit contains an oscillatory circuit 1 on an uncontrolled 2 and discrete controlled 3 elements, a clock generator 4, an amplitude detector 5, an analog-to-digital converter 6, a memory register 7, a code comparison unit 8, an OR element 9, a register 10 shear, trigger 11, controlled key 12, counter 13 and reversible counter 14.

A device for automatically tuning the oscillatory circuit operates as follows.

Before starting work, an initial setting pulse is applied to the control input of the device, which sets the shift register 10, counter 13 and trigger 11 to the initial state. At the same time, the operation mode of the reverse / counter 14 is provided in the mode of summing the number of input pulses arriving at its counting input from the output of the generator 4, and at the same time produces its zeroing. In this case, the nominal value of the discrete controlled element 3 is set to a minimum value. Further, as the number of pulses arriving at the input of the reversible counter 14 increases, its digital code increases, causing a corresponding increase in the nominal value of the discrete controlled element 3 and a corresponding restructuring of the oscillating circuit.

Alternating voltage from the oscillatory circuit 1 is supplied to an amplitude-50 solid detector 5, where it is detected. The output voltage of the amplitude detector 5 is converted to a digital code in the analog-to-digital converter 6 and is fed to the input of the memory register 7. Upon receipt of the pulse memory register .7 from the second output of the generator 4, delayed for a time interval shorter than the repetition period of the output pulses generator 4, the digital code of the memory register 7 is overwritten to its output. Thanks to this block 8 code comparison provides a comparison of the next digital code with the previous one, stored in the register 7 of the memory.

The level of the logical unit at the first output of block 8 code comparison. generated if the subsequent value of the digital code is less than the previous one.

The level of the logical unit at the second output of block 8 code comparison is generated if the subsequent value of the digital code is not less than the previous one.

The appearance of a pulse at the first output of block 8 code comparison indicates the resonant characteristics of the oscillatory circuit.

In order to exclude tuning to false resonance characteristic maxima associated with spurious dips in the adjustment characteristic of the discrete tunable element 3, the pulse taken from the first output of the code comparison unit 8 is recorded in the shift register 10. In this case, the signal at the control input of the reverse counter 14 does not change , since the state of the trigger 11 does not change. When setting to a false maximum, the next pulse taken from the second output of the code comparison unit 8 returns to the pulse shift register 10 from the second code link through the setup input

If the maximum of the resonance characteristic is not false, then after recording two consecutive pulses in the shift register 10, a signal appears at its output, switching the trigger 11. The output signal of the trigger 11 switches the reverse counter 14 into the subtraction mode and opens the controlled key 12. Pulses with the output of the generator 4 through a controlled key 12 is fed to the counter 13, in which two pulses are recorded, i.e. the counter 14 is returned to the value. corresponding to the exact maximum passage of the initial state due to the filing of the output of block 8 with the OR OR 9 element on the shift register 10.

adjustment of the oscillatory circuit 1. After that, the output signal of the counter 13 turns off the generator 4.

If - · the next adjustment of the oscillatory circuit is necessary, then it can be done by applying the initial setting pulse to the control input of the device.

The oscillation circuit tuning accuracy has been improved ’due to the use of digital circuits in the device.

Claims (1)

SUMMARY OF THE INVENTION 'A device for automatically adjusting an oscillatory circuit, comprising a series-connected oscillatory circuit formed in parallel or sequentially connected by an uncontrolled and discrete controlled elements, and an amplitude detector, a series-connected generator, clock pulses and a reversible counter, the outputs of which are connected to the corresponding inputs of the discrete controlled element connected in series with the controlled key and counter, while the control input is The key being connected is connected to the control input of the reversible counter, the input of the controlled key is connected to the output of the generator • 5 clock pulses, and the output of the counter is connected to the control input of the clock generator, which differs in that, in order to increase the adjustment accuracy IQ, a series-connected analog-digital converter, memory register, code comparison unit, shift register and trigger, OR element, the first input of which is connected to the setting inputs of the trigger and counter and forms the control input of the device A automatic oscillation circuit configuration, the second input ₂ θ is connected to a second output code comparator, and an output - with a mounting input shift register latch output is connected to control input of controllable switch, the second output gene25 Rhatore clock coupled to memory register control input, the input which is connected to the second input of the code comparison unit.