SU1462280A1 - Device for stretch-linear approximation - Google Patents

Abstract

The invention relates to automation and computing and can be used, for example, to generate with high precision a sequence of samples of a fast oscillating function with a minimum amount of used memory. The purpose of the invention is to increase speed. The goal is achieved by introducing RS-flip-flop 2, elements AND 4 and OR 6, accumulating adder 8. A device for piecewise-linear approximation contains a generator of 1 pulses, RS-flip-flop 2, a counter 3 addresses, element And 4, permanent memory 5, the element OR 6, the counter 7, the accumulating adder 8, the launch input 9, the output signal bus 10. Accumulator adder 8 contains an adder and a register. 3 il .® (L

Description

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The invention relates to automation and computer technology and can be used, for example., To generate a high accuracy of a sequence of samples of a fast oscillating function with a minimum amount of used memory.

The purpose of the invention is to increase speed. ,

Figure 1 shows the functional diagram of the device; 2 shows timing diagrams of the most important for: understanding the operation of the device signals; ,; on fig.Z - accumulating adder.

Device for piecewise linear

: approximations (fig, 1) contains a gene; pulse rapper 1, RS flip-flop 2, address j counter, element AND 4, persistent storage 5.20 element OR 6, counter 7, accumulator 8, start input 9, bus 10 output signal. Accumulating adder 8 (FIG. 3) contains adder II and register 12,

The device works as follows,

The approximation of the code sequence and,., (FIG. 2) at the output of the accumulating adder 8 begins at 30

with admission

Under

the impact of this pulse counter. The 3 addresses and the adder 8 are zeroed out and the short-circuit trigger 2 is set to one.

The outputs of the permanent storage device 5 are divided into two floors. In the field corresponding to the first output, the length of the interval is recorded (as the number of periods of generator 1) at which the integration step of the output signal of the device has a constant value, and in the field corresponding to the second output is recorded the sign-ic approximation containing the generator

time t (, O pulse and about from the input 9 run.

ki of counter 7 and the clock input of the adder 8. The information inputs from the second outputs of block 5 are supplied with the value of the approximation step that is constant for a given interval of this approximation.

For each pulse from the output of the element AND 4 of the counter 7, it reduces its state by one, and the accumulating adder 8 sums the value of the integration step. After the arrival of K pulses from the output of the OR 4 element, where K is the code of the length of the first approximation interval, a pulse 7 appears at the overflow output of the counter. Under the influence of the latter, the counter 3 switches to the following position, at which sets the length of the second approximation interval K, j, and on the second outputs of block 5 sets the value of the integration step on this interval, Lod by the action of the same pulse 25 and passing through the element OR 6, the value 7 is written to counter 7 Device operation takes place analo. in a hectic way.

After generating the N-1 pulse from the output of the counter 7, the counter 3 switches the charts to the position at which the pulse Uj appears at its overflow output, which triggers trigger 2 to the zero state. As a result, the pulses from the generator 1 exit through element 4 and ends with an approximation of the output signal.

To generate decreasing functions. it is necessary to take into account the increment sign

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Claims (1)

Formula invented and device for piecewise linear this step. Thus, for approximation of the entire signal duration, N-1 layers of block 5 are used, where N is the number of interpolation nodes (in FIG. 2, N 8 is taken). Under the influence of the pulse Uq passing through the OR 6 element at the preset resolution input of the second counter 7, the code of the first approximation interval from the first output of block 5 is fixed in the latter. The unit state of the ES flip-flop 2 permits the passage of the clock pulses of the generator 1 to the input subtraction50 55 pulses, - a counter, an address counter, a persistent storage device, the output of an address counter being connected to the address input of a permanent storage device, about which, in order to improve speed, RS- trigger, element AND, element OR. and accumulating adder, the output of the pulse generator connected to the first input of the element And the second input of which is connected to the output of the RS-Trigger, the setup input of which is combined with the reset inputs 0 five 0 0 ic approximation containing generator ki of counter 7 and the clock input of the adder 8. The information inputs from the second outputs of block 5 are supplied with the value of the integration step approximation constant for a given interval. For each pulse from the output of the element AND 4 of the counter 7, it reduces its state by one, and the accumulating adder 8 sums the value of the integration step. After the arrival of K pulses from the output of the OR 4 element, where K is the code of the length of the first approximation interval, a pulse 7 appears at the overflow output of the counter. Under the influence of the latter, the counter 3 switches to the next position at which the first outputs of the block 5 sets the value of the length of the second approximation interval K, j, and on the second outputs of block 5 sets the value of the integration step on this interval, Lod by the action of the same pulse 5 and passing through the element OR 6, counter 7 records the value K analogous operation of the device occurs. in a hectic way. After the N-1 pulse has been generated from the output of the counter 7, the counter 3 switches to the position at which a pulse Uj appears at its overflow output, which triggers trigger 2 to the zero state, which results in this. This stops the passage of the pulses from the output of the generator 1 through the element 4 and ends the approximation of the output signal. To generate decreasing functions. it is necessary to take into account the increment sign. five 0 approximations containing a generator Formula invented and device for piecewise linear 0 five pulses — a counter, an address counter, a persistent storage device, the output of the address counter of the boat being connected to the address input of the permanent storage device, which is, moreover, with the aim of increasing the speed, RS -trigger, element AND, element OR. and accumulating adder, the output of the pulse generator is connected to the first input of the element AND, the second input of which is connected to the output of the RS-.trigger, the setup input of which is combined with the reset inputs the address counter and accumulating adder, the first input of the OR element and is connected to the device start input, the output of the AND element is connected to the counter input of the counter and the clock input of the accumulating adder, the data preset inputs of which are connected respectively to the output of the code of the length of the approximation section and the approximation step a permanent storage device, the overflow output of the counter is connected to the second input of the OR element and the counting input of the address counter, the overflow output of which is connected to the reset input of the RS flip-flop, the output of the OR element is connected to the counter of the preset counter, the accumulator accumulator output is connected to the device output. 3 ta t t3 L I t o one T.L 1 To block 5 tfy five ts I I Lj Lj I 1 fig 2 B To tire / 2