SU1425641A1 - Data input device - Google Patents

Abstract

The invention relates to the field of computer technology, in particular, to devices for entering information into a computer, and can be used in automated control systems or technological equipment. The aim of the invention is to increase the reliability of the transmitted information. The device for entering information contains a group of elements AND 1, counters 2 and 12, triggers 7.8 and 18, elements OR 3.9 and 14, elements AND I10, 13 and 15, the element EXCLUSIVE OR 6, decoder 5, keyboard 4,: element NOT 17, support element 16. The entry of the code of the pressed key of the keyboard 4 in the computer occurs only i after checking the duration of the pulses received from the keys with the help of the counter 12 and stops after releasing the key. Subject the most excluded is re-recording in the computer code, pressed key 2 or less. (L C fro ate about 4; fm1

Description

The invention relates to computer technology, in particular, to devices for entering information into a computer, and can be used in automated systems for controlling technological equipment, for example, in computer numerical control devices (CNC) for turning milling machines and in core for controlling - USING of programs using the operator's console.

The aim of the invention is to determine the reliability of the "formation

Figure 1 shows a block diagram of the device; on - time diagram, as shown in the g-ed output, I Device, E1 input of information contains a group of elements AND 1, second counter 2, first element OR 3, keyboard 4j decoder 5, element EXCLUSIVE OR 6, first trigger 7 , the second trigger 8, the second element HIDii .9, the first element And 10, the generator. 111 pulses, the first counter 12, the third element AND 13, the third element OR | l4j the second element AND 15 the element 16; the delay, the element NOT 17, the third ter 18,

The device for input and operation will work as follows

All keyboard pins are 4 unified -; H8NY in the n groups of SW keys in each; the group where m is the number of the state 2 ,, In the initial state, the trigger signals 7.8 and 18 are set to the initial state by a high level signal on the stopping input of the device. The high level signal from the inverse in. Of trigger 8 (FIG. 2, B, t (,) arrives at the first input of the element AND 10, allowing the impulses from the generator code 11 to pass pulses (fig2, a) to the counting input counter 2, counter 2. generates codes arriving at the inputs of the decoder 5, the outputs of which are formed by high-level signals, alternately polling all

 Keyboards 4 in a group. Until any key of the keyboard 4 is rolled up, the output of the WL 3 element is held by the low level signal, allowing the element U1U1KYAYU1EE OR 6 signal high level, arriving at the set input, to keep the counter 12 in the initial state (g, to).

Q

,five

about 0

0

five

After pressing the keys of the keyboard 4, the high level signal from the corresponding output of the decoder 5 via the closed bounce key is sent to the corresponding input of the IZH element 3, From the output of the OR element 3 the high level signal (FIG. 2, b, t) goes to the counting input trigger 8, setting its positive front of the first bounce pulse to one state. The low level signal from the inverted output of the trigger 8 (FIG, C) is fed to the first input of the element 10, prohibiting the passage of pulses from the generator I1 of the pulses to the counting input of the counter 12, the state of the counter 2 corresponding to the key code of the pressed key 4 in the group and the sign of the pressed group is received respectively at the inputs of the first group of elements of the AND group. At the same time, a high level signal from the output of the element OR 3 is fed to the first input of an ICAM unit 1AM) EE OR 6, the output of which, when the signals coincide, a low level signal is generated by unlocking counter 12, since short bounce pulses cannot hold the counter 12 unlocked until a signal is generated at its output, then counter 12 begins to count its cycle of operation after the end of the last bounce pulse (FIG. 2, b, b). After the cycle of operation has been counted, a high level signal is generated at the output of counter 12 Ts-2), which sets a positive edge trigger 7 in a single state. The low level signal from the inverse output of the trigger 7 is fed to the second input of the element ESC 6 or 6, forming a high level signal at its output and thereby setting the counter 12 to the initial state. At the same time, a high level signal from a non-inverted pin (Fig. 2, d, t3) of trigger 7 is fed to the counting input of trigger 18, setting it to one state. The high level signal from the VGO output (FIG. 2) receives the second inputs of a group of elements AND 1 of the group allowing the code of the pressed key of the 4 to pass to the information outputs of the device. The high level signal from the output of the trigger 18 is also fed to the control output of the device by allowing the writing of a code to the computer.

When the keyboard 4 is released, the low level signal with bounce comes from the output of the element OR 3 (FIG. 2, B, t) through the element NOT 17 to the first input of the element AND 13. At the output of the element AND 13 a high level signal is generated, which through the element OR 1A sets trigger 18 to well

.

the second counters, the decoder, the group of elements AND, the first and second elements OR, the element EXCLUSIVE ORE, the first and second triggers, the output of the pulse generator is connected to the first input of the first element AND and the counting input of the first counter, the output of which is connected to the synchronous input of the first triggers

left state. The low level signal Q Gera, the inverse output of which is connected from the output of flip-flop 18 (FIG. 2, e, t () to the first input of the EXCLUSIVE element), goes to the control output of the device - Р {ЕЕЖЖ, the output of which is connected to the device , informing the computer about the end of the first counter entering the keyed key code, the code of the first element P is connected 4, After the last bounce ends 15 second input, the output pulses at the first input of the EXCLUSIVE OR 6 element (Fig.2, b , t) at its output a low level signal is formed, allowing counter 12

20

re-count its cycle of operation until a high level signal is formed at its output (Fig. 2, g, C). The positive edge of the signal sets trigger 7 to the zero state. Whitefish-

which is connected to the inputs of the decoder, the outputs of which are connected to the inputs of the keyboard, the outputs of which are connected to the inputs of the first OR element, the output of which is connected to the synchronous input of the second trigger, the second input of the EXCLUSIVE element; E OR, and the information input of the first trigger; the output of the second trigger is connected to the secondary -

A high level from the inverse output 25 of the input of the first element AND, the output of the trigger 7 enters the second DO of the second counter and the keyboard is connected to the inputs of the first group of the corresponding elements AND of the group, the output of the element is EXCLUSIVE OR 6, thereby setting the counter 12 into the input state as well as

Which are informational

To the first input of the element 15, the device's cut, the reset input of the first trigger and the first input of the second element OR are the installation input of the device, the output of the second element OR is connected to the reset input of the second trigger, characterized in that, in order to increase the reliability of the transmitted information , the second and third elements are entered into the device, the third element OR, the third trigger, the element NOT, the delay element, the information inputs of the second and third triggers are connected to the tin of the logical unit, the inverse output of the trigger connection En with the first input of the second element AND, the output of the cat passing through it the delayed element 16 of the delay of the signal of the BJICOKO level from the output of the counter 12, The high level signal from the output of the element AND 15 (FIG. 2, k, D) goes through the element OR 9 to the installation input of trigger B, setting it to the zero state. The high signal from the output of the trigger 8 (figure 2, b, enters the first element And 10, allowing the passage of pulses from the generator output 11 pulses to the counting input of the counter 2, after which the device is ready for the next keystroke of the keyboard 4,

Thus, the device provides input information with high accuracy. The proposed device makes it possible to reduce the time spent on program development in a flexible automated system; improve computer performance, increase the reliability of the entire system.

Claims (1)

Invention Formula A device for entering information comprising a pulse generator, a keyboard, the first element AND, the first and Hera, the inverse output of which is connected to the first input of the element EXCLUDING {EE IZH, the output of which is connected to the set input of the first counter, the code of the first element P is connected by the input of the second counter, the outputs which is connected to the inputs of the decoder, the outputs of which are connected to the inputs of the keyboard, the outputs of which are connected to the inputs of the first OR element, the output of which is connected to the synchronous input of the second trigger, the second input of the EXCLUSIVE element; E OR, and the information input of the first trigger; the output of the second trigger is connected to the secondary - Which are informational about device reset input per5 The first trigger and the first input of the second element OR are the installation input of the device, the output of the second element OR is connected to the reset input of the second trigger, characterized in that, in order to increase the reliability of the transmitted information, the second and third Elements AND, the third element OR, The third trigger, the NOT element, the delay element, the information inputs of the second and third triggers are connected to the logical unit unity, the inverse output of the trigger is connected to the first input of the second And element, the output of which is connected to the second input of the second element OR, the output of the first counter through the delay element is connected to the second input of the second element OR, the direct output of the first trigger is connected to the synchronous input of the third trigger, the output of which is connected to the inputs of the second group of elements AND group, the first input of the third element And gating output device 5 VA, the output of the first element OR is connected to the input of the element NOT, the output of which is connected to the second input of the third element AND, the output of which is connected # 14256A1, J: .b It is connected with the first input of the third element of the third element OR connected to the city of the entrance, the code of which is connected to the entrance to the reset house of the first trigger. reset the third trigger, the second input G rijnJTJTJT ..,. ... .. JIJT    HiHiitfc tt "I to Phases. g tl its t. tl