SU1418886A2 - Noise generator - Google Patents

Abstract

The invention relates to radio engineering and communications, measuring)) this; 1noy technique and m. used for testing and testing of non-resistance systems for various purposes. The purpose of the invention is to improve the uniformity with 1-spectral (: 1H Slot-MOUTH MOUTH.The device contains G-1 and 5 non-random random pulse sequence, shift registers 2 and 7, G-r 3 synchronization signals, block 4 multipliers, divisor 6 frequency Mr. Gn 8 nyuundy frequency, M code registers 9i 9 ", controlled phase shifters lOi-10 ,,,, adder 11, low-pass filter 12. The goal is provided by introducing into the switch 13 device, block 14 .mini, adder 15 codes, shift register 16. Provided there is an autocorrection function. nktsii eksnonenpialnoy with the envelope has P1ey .mesto novipenie spectral uniformity p.yutnosti mopiyusti output signal HivMOBOi o. 1 yl.

Description

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The invention of radio engineering and communications, measurement technology, can be used in tests and studies of noise immunity of various systems and is an improvement of the invention according to the author. St. No. 1166266.

The purpose of the invention is to improve the uniformity of the spectral density of the noise power.

The drawing shows a structural electrical noise generator circuit.

The generator contains the first generator 1 pseudo-random sequence of pulses, the first register 2 shift, generator 3 clock signals, block 4 multipliers, the second generator 5 pseudo-random sequence of pulses, the frequency divider 6, the second register 7 shift, 8 descent frequency, Al code registers 9i -9 , „, M controlled phase shifters 10 | 10 „, adder 11, low pass filter 12, switch 13, block 14 permanent memorization, adder 15 codes, third shift register 16, and block 4 multiply. Which contains M adders 17 | --17m modulo two, and the second generator 5 of a pseudo-random sequence of pulses is the shift register 18 and the adder 19 modulo two.

The noise generator works in the following way.

When pulses are fed from generator 3, pseudo-random impu sequences are generated. First 1 and second 5 generators, which from the outputs of the first register 2 and register 18 covered by feedback through adder 19, enters the inputs of sum 17i-O7v . unit 4, resulting in the output b. Yukas 4 form uncorrelated sequences of uniform binary numbers.

The resulting sequences of equally probable binary numbers arrive at the first inputs of the switch 13 and simultaneously to the address inputs of the block 14, the output of which forms sequences of codes with the normal distribution law, the incoming inputs to the first inputs of the adder 15, and the second inputs of the sequences arrive codes shifted in time by the number of clock intervals corresponding to the number of bits of the third reg signal 16. Due to this, the autocorrelation function of the output noise signal has the form awnings of peaks with an exponential envelope. Recorded from the output of the switch 13 in the M code registers 91--9 m, the information controls M

controlled phase shifters 10i - Yushm. The received signals are summed in adder 11, and the control by M code registers 9; -9 "is produced by signals from the output of the second register 7 connected to generator 3 through divider 6. M controlled phase shifters 10 | - UC introduce random phase shifts into the signal of the carrier frequency generator 8, as a result of which a set of harmonic voltages takes place at the output of the adder 11

0 with random amplitudes and phase shifts, which is smoothed by filter 12. Under the specified condition for the presence of an autocorrelation function with an exponential envelope, the uniformity of the power spectral density increases

sound output signal.

Claims (1)

Invention Formula 1 generator 1puma auth. St. X 1 166266, characterized in that, in order to increase the uniformity of the power spectral density njyMa, each output b. The Yuka PMs are connected to the corresponding information inputs of the .M code registers through the input switch, as well as enter} 1Y successively | соединno connected b.yuk constant zanomiyani, adder codes and the third shift register, the bit outputs of which are connected to the corresponding control inputs of the switch, the inputs of the constant zanomipani unit connected to the corresponding outputs of the non-multiplier block, the second group of information inputs of the code adder is connected to the corresponding bit outputs of the 3H) shift register, and the control input Tpeibei o shift register is connected to the output of the generator clock signals.