SU1406530A1 - Device for measuring pulse flat portion sag - Google Patents

Abstract

The invention can be used when sorting out electronic products by the magnitude of the decay of the flat part of rectangular test pulses and measuring the magnitude of the decay rate of the output voltage of analog storage devices. The device for measuring the decay of the flat part of the pulse contains 1.2 memory blocks, a differential amplifier 3 and a synchronization unit 4. In the description of the invention, two block diagrams of synchronization unit 4 are given depending on the functional purpose of the device. The device is simply by k-instructions. 2 hp f-ly, 5 ill.

Description

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The invention relates to electrical measuring equipment and can be used when sorting electronic products by the magnitude of the decay of the flat portion of rectangular test pulses, as well as when measuring the magnitude of the decay rate of the output voltage of analog storage devices.

The aim of the invention is to enhance the functionality of the device by allowing the measurement of the magnitude of the decay of the flat portion of the rectangular pulse and the decay rate of the output voltage of the analog storage device, as well as the simplification of the device.

FIG. 1 shows a structural diagram of the proposed device; in fig. 2 is a block diagram of a synchronization unit used to measure the magnitude of the falloff / flat part of a pulse; in fig. 3 shows the structure of the sync block circuit used to measure the decay rate of the output voltage of the ACS; in FIG. A - voltage diagrams explaining the operation of the device when measuring the magnitude of the decay of the flat part of the pulse; in fig. 5 shows voltage diagrams for the operation of the device when measuring the rate of decay of the output voltage of the CAM.

The device contains (Fig. 1) memory blocks 1 and 2, differential amplifier 3 and synchronization unit 4, the input of synchronization unit 4 being an input of the device, the first and second outputs of unit 4 are connected to the first and second inputs of memory 1, respectively the output of which is connected to the first input of the differential amplifier 3, the first and third outputs of the synchronization unit 4 are connected respectively to the first and second outputs of the memory block 2, the output of which is connected to the second input of the differential amplifier 3, and its output is the output of the trials. As blocks 1 and 2 of memory, KRPKESKZ chips can be used with additional feedback elements and storage capacitors. The differential amplifier 3 may be performed on an operational amplifier, for example. K140UD14, with appropriate feedback resistors. Block 4

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synchronization, used to measure the decay of the flat part of the pulse (Fig. 2), contains shapers 5 and 6 pulses and an adjustable delay unit 7, the device input being connected to the input of the shaper 5 im. The pulse I is the first output of the synchronization unit 4, the output of the imaging unit 5 is the second output of the synchronization unit 4 and connected to the input of the unit 7, the output of which is connected to the input of the imaging unit 6 of the pulse, the output of which is the third output of the synchronization unit.

Shapers 5 and 6 pulses can be built on the basis of integrated timers KR1006VI1, included in the mode of one-shot. The duration of the pulses generated by these timers should be greater than the sampling time of the KRPOSKZ chips used as memory blocks.

The adjustable delay unit 7 may contain a pulse former on the front of an input signal on a K155LAZ chip and an RC chain, the output of which is connected to the single-vibrator input on the KR1006VI1 timer, the pulse duration in which is controlled by a variable resistor, the single-oscillator output is connected to the input of the pulse shaper on the input slope the signal on the chip K155LAZ and RC-chain.

Synchronization unit 4 used by the dd of measuring the decay rate of the output voltage of the ACD (Fig. 3), contains a generator of 8 pulses, a counter 9, a decoder 10 and the measured ACU 11, the device input being connected to the first input of the АSU 11, the output of which is the first output synchronization unit 4, generator output 8 is connected to the input of counter 9, the output is costly connected to the input of the decoder, the first output of which is connected to the second input of the CAM 11, and the second and third outputs are respectively the second and third outputs of the synchronization unit 4.

The pulse generator 8 can be made on a K155LAZ chip using a quartz resonator. Dp counter 9 you can use the chip K155IE5. The decoder 10 can be; built on a K155IDZ microcircuit using a chip

K155LN1 for inverting output signals.

The device works as follows.

Before measuring the decay of the flat part of a rectangular pulse using a block, 7 adjustable delays, the delay between the pulses produced by the shaper 5 and 6 is equal to the duration of the rectangular pulse under investigation (Fig. 4). A rectangular impulse under investigation, having an initial amplitude and., Which drops to the Ug value by the moment of the end of the pulse (Fig. 4a), is fed to the input of the device. The investigated rectangular impulse arrives at the information inputs of memory blocks 1 and 2. The sampling pulse generated by the pulse shaper 5 (Fig. 4c) is fed to the control input of the memory block 1 at a time t. After the sampling pulse has been terminated, the voltage Id is fixed at the output of memory 1 (Fig. 4i). Before the end of the pulse under investigation, the control input of memory 2 at time t; 2 is given a selection pulse produced by pulse shaper 6 (Fig. 4d) As a result, the voltage Ug is fixed at the output of the memory block 2 (Fig. 4k). From the outputs of blocks 1 and 2 voltage. Uj is fed to the inputs of the differential amplifier 3 and a voltage dUc (Fig. 4L) is set at its output, equal to the difference of the voltages U and Ug dUc UA-UB.

Thus, at the output of the device after the end of the next pulse pulse, the voltage JU (., Equal to the decay time of the flat hour; the square wave pulse) is set.

In measuring the rate of decay of the output voltage of the ABC, synchronization unit 4 is used, shown in FIG. 3. A constant voltage UD is applied to the information input of the measured AMS 11 (Fig. 5a). The pulse generator 8 generates clock pulses that are converted by means of counter 9 and decoder 10 into sampling pulses for memory block 1 (Fig. 5b), memory block 2 (Fig. 5d) and for the measured AMU 11 (Fig. 5). 5e). At time t, the control input of the measured CAM 11 is fed to them

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sampling pulse (Fig. 5d), a voltage is set at the output of the measured AMS 1I (Fig. 5b)

Ul-U.- lUc / nt,

where uj. - the bias voltage of the measured AMS i1. At time tj, the sampling pulse measured by the AMS 11 stops and the voltage at its output begins to decrease due to the leakage current of the key until the next sampling pulse. The next sampling pulse, measured by the CAM 11, is supplied at the time instant t,.. By this time, the voltage at the output of the CAP 11 being measured becomes Uj. Thus, to determine the rate of decay of the output voltage measured by the AMC 11, it is necessary to determine the voltage difference

for a fixed time interval, which is usually chosen to be a multiple of 1, 10, 100, etc. For example, T ms, 10 ms, or 100 ms. To determine the magnitude of the change in the output voltage, measured by the AMC 11, a sampling pulse (Fig. 5d) is fed to the control input of memory block 2 at time tj, and a sampling pulse is applied to the control input of memory 1 at time t (Fig. 5c), as a result of which, in memory block 2, the voltage U (Fig. 3k) is stored,. which was present at the output of the measured CAM 11 at the moment of time t-j, and in block 1 of the memory is stored; the strap U (Fig. 5i), which was present at the output of the measured CCD 1 1 at the time t j. The voltages from the outputs of blocks 1 and 2 are fed to the inputs of the differential amplifier 3, where the difference between these voltages and and, - and 1 is determined (Fig. 5L).

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The decay rate of the output voltage of the CAM will be equal to

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 and 8th, t (p t where whether is the voltage at the output of the differential amplifier; T t5-tj is the time interval between the ends of the pulses of the sample of blocks 1 and 2.

Thus, at the end of the measurement, a voltage is set at the output of the proposed device, which is proportional to the decay rate of the output voltage, as measured by an AAM of 1 G,

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Claims (3)

Claim 1. A device for measuring the decline of the flat part of the pulse, containing a memory unit, the output of which is connected; With the first input of a differential amplifier, characterized in that, in order to expand the functionality and simplify the device, a second memory unit and a synchronization unit are introduced into it whose input is the input of the device, the first output of the synchronization unit is connected to the first inputs of the first and second memory units, the output of the second memory unit is connected to the second input of the differential amplifier, the output of which I is the output of the device, the second and third outputs of the block. Synchronization 20 is connected respectively to the second inputs of the first and second memory blocks. 2. The device according to π. 1, characterized in that the synchronization unit 25 contains two pulse shapers and an adjustable delay unit, the input of the first pulse shaper is connected to the input of the device and is the first output of the synchronization block, the output of the first pulse shaper is connected to the input of the adjustable delay unit and is the second output of the synchronization unit, the output of the adjustable delay unit is connected to the input of the second pulse shaper, the output of which is the third output of the synchronization unit. 3. The device according to claim 1, wherein the synchronization unit comprises a pulse generator, a counter, a decoder and a measured analog storage device, the first input of which is connected to the input of the device, the output of the pulse generator is connected to the input of the counter, the output of which. connected to the decoder input, the first decoder output is the second output of the synchronization unit, the second decoder output is connected to the second input of the measured analog storage device, the output of which is the first output of the synchronization unit tion, the third output of the decoder is the third output of the synchronization unit. figure 2 Cha