SU1666965A2 - Digital frequency meter - Google Patents

Abstract

The invention can be used in high-speed electrical signal frequency meters. The device contains an input driver 1, a generator 2 sawtooth voltage, a peak detector 3, a controlled generator 4, the first and second triggers 5, 6, the key 7, the first differentiating circuit 9. The introduction of an additional comparator 10, a decoder 14, a two-position switch 13, a counter The 17 pulses, the memory register 18, the second differentiating circuit 16, the reference voltage source 11, the voltage divider 12, the logic key 15, and the scale bus 21 increase the accuracy and extend the range of measured frequencies. 3 hp f-ly, 8 ill.

Description

The invention relates to electrical measuring equipment and is intended for use in mechanical engineering for measuring, for example, the frequencies of rotation of turbine shafts, thermal and electric motors, etc.

The aim of the invention is to improve the accuracy and expand the range of measured frequencies.

Fig. 1 is a functional diagram of a device for digital frequency measurement; in fig. 2 shows time diagrams explaining the operation of the device; in fig. Figures 3–7 show the functional diagrams of the blocks, respectively, of the controlled one-shot, logical key, current generator, peak detector, and pulse frequency reference generator; in fig. 8 shows the timing diagrams of the controlled one-shot operation.

A device for digital frequency measurement (Fig. 1) contains an input driver 1, a sawtooth voltage generator 2, a peak detector 3, a controlled oscillator 4. the first and second triggers 5, 6, a key 7, a pulse frequency generator 8 of the reference frequency, the first differentiating circuit 9, comparator 10, voltage source 11, voltage divider 12, two-position switch 13, decoder 14, logical key 15, second differentiating circuit 16, pulse counter 17, memory register 18, input bus 19, output bus 20 bus 21 scale connected to the out The source of the reference voltage source 11, with the output of the voltage divider 12 and with the second input of the comparator 10 connected to its first input with the first input of the peak detector 3 and with the output of the sawtooth voltage generator 2, the first starting input of which is connected trigger 5 and with the output of the input shaper 1, whose input is connected to the input bus 19. The output of the decoder 14 is connected to the control input of the two-position switch 13. The comparator 10 is connected by its output to the second control the input of the sawtooth generator 2 and the first input of the pulse frequency generator 8 of the reference frequency, the second input of which is connected to the third control input of the tracking mode of the peak detector 3, to the second control inputs of the memory register 18 and the logical switch 15, and also to the inverting output of the first trigger 5, the second R-input reset of which is connected to the output of the differentiating circuit 9. The non-inverting output of the first trigger 5 is connected to

the first installation input of the second trigger bis input of the differentiating circuit 16, connected by its output with the second reset input of the pulse counter 17, the first

the counting input of which is connected via switch 7 to the first output of the pulse generator 8 of the reference frequency, the second output of which is multichannel and connected via a logic switch 15 to the digital multi-channel input of the decoder 14 and to the fourth multichannel control input of the generator 2 of the sawtooth voltage connected by its third a control input with an output of a two-position switch 13, the first and second information inputs of which are connected respectively to the first and second outputs of voltage divider 12. The output of the peak detector 3 is connected to the input

0 controlled generator 4, connected by its output to the counting input of the second trigger 6, the output of which is connected to the input of the differentiating circuit 9 and to the control input of the key 7 made

5 inverse. The output of pulse counter 17 is connected to the first digital information input of memory register 18, the output of which is connected to the output bus 20. The sawtooth generator 2 (Fig. 1) contains a current generator 22 with a multichannel control input, a two-position switch 23, a reference capacitor 24, element 25, delay element 26, converter 27

5 codes, controlled one-shot 28, element OR 29,

The first input of the controlled one-shot 28 is connected to the output of the element OR 29, the first and second inputs of which are, respectively, the first start input and the second input of the sawtooth generator 2, the third input of which is the first information input of the two-position switch 23, the second

5 whose information input is connected to the output of current generator 22, the output of sawtooth generator 2 is the first output of reference capacitor 24 connected to the output

0 two-position switch 23 connected to its control input with the output of the element And 25, the first input of which is connected to the output of the controlled one-shot 28 and to the input of the element 26

5 of a delay connected by its output to the second input of the element 25, the second multi-channel control input of the controlled single vibrator 28 is connected to the second output of the code converter 27, the first output of which is connected to the control

the multichannel input of the current generator 22, the converter input 27 of the code is the fourth multichannel input of the sawtooth generator 2, and the second output of the reference capacitor 24 is connected to the zero potential bus.

The controlled one-shot 28 contains (Fig. 3) the keys 30, 31, the code-controlled resistance 32, the comparator 33, the source of the reference voltages, the D-flip-flop 35, the generator 36 of the logical G, the operational amplifier 37, the capacitor 38

The non-inverting output of the trigger 35 is connected to the control input of the first key 30 and is the output of a controlled one-shot 28, the first input of which is the C-sync input of the trigger 35, the inverting output of which is connected to the control input of the second key 31 connected with its information input the output of code-controlled resistance 32, with the first output of the capacitor 38 and with the inverting input of the operational amplifier 37, the output of which is connected to the output of the second switch 31, to the second output of the capacitor 38 and to the first input a comparator 33 connected by its output and a second input, respectively, to the first R input reset input of the trigger 35 and to the first output of the reference voltage source 34, the second output of which is connected via the first switch 30 to the first analog input of the coding control resistor 32, the digital control input of which is the second multi-channel control input of the controlled single-oscillator 28, the third output of the reference voltage source 34 is connected to the non-inverting input of the operational amplifier 37 and the zero potential bus, and the third one ormatsionny D- trigger input 35 connected to the output of the generator 36, a logic 1.

The current generator 22 comprises (FIG. 5) a code-controlled resistance ESR, first and second resistors 40 and 41, a transistor 42, a diode 43 connected by its cathode to a vase of transistor 42 and through a resistor 41 to a zero potential bus. The collector of transistor 42 is the output of current generator 22, the multichannel control input of which is a digital control input of code-controlled resistance 39 connected between the emitter of transistor 42 and the output of power supply 44 connected through a resistor 40 to the anode of diode 43.

Peak detector 3 is configured to control the tracking mode (tracking) of its input voltage.

output and contains (Fig. 6) a capacitor 45 and a bidirectional switch 46, the control input of which is the control input of the tracking mode peak

a detector 3, the first information input of which is a switch 46. The output of which is connected to the first terminal of the capacitor 45 and which is the output of the peak detector 3, and the second terminal of the capacitor

0 45 is connected to the zero potential bus.

The pulse generator 8 of the reference frequency contains (Fig. 7) a pulse counter 47, a multiplexer 48, a pulse generator 49, h pulse frequency dividers 50-1450-h.

5 Logical key 15 contains (Fig. 4) I

And 51-1f51-l elements, the first inputs of which together form the information multichannel first input of the logical key 15, the multichannel output

0 which together form the outputs of the elements 51-1451-1, the second inputs of which are connected together and form the second control input of the logical key 15.

In the pulse generator 8 of the reference frequency (Fig. 7), the first counting input of the pulse counter 47 is the first control input of the pulse frequency generator 8, the second control input of which is the second input to the zero state of the pulse counter 47, multichannel the output of which is connected to the control multichannel input of the multiplexer 48 and is the second multichannel output of the pulsed

5 of the reference frequency generator 8, the first output of which is the output of the multiplexer 48, the output of the pulse generator 49 is connected to the first information input of the multiplexer 48, the remaining h of the information inputs of which are connected to the outputs of the respective dividers 50-1g50 -h connected in a series circuit, and the input of the first divider 50 -1 frequencies is connected to the output of the generator 49 of pulses.

The device works as follows

The Dig pulses of the measured frequency from the input bus 19 (Fig. 2a), arriving at the time point C at the first input of the driver 1, cause the appearance of the pulse Ui (Fig. 26), which sets the first trigger 5. After installing from logical 1 to its the direct output through the differentiating circuit 16 resets the pulse counter 17 and goes to the first installation input of the second trigger 6. Since the first input of the second trigger 6 is inverse, then the logic 1 at its first input removes its condition

forced installation in the state of logical 1, thus making the second trigger 6 sensitive to pulses at its second counting input coming from the output of the controlled generator 4, the frequency of which is proportional to the voltage supplied to the input of the controlled generator 4 from the output of the peak detector 3 The first of the generator 4 pulses after the time ti, removing the condition of forcing the second trigger b on its first input, at the time t2 leads to the establishment of the second trigger

6in the state of logical O, and the second returns it to the initial state of logical 1 at time t4, while the pulse Ug of positive polarity from the output of the differentiating circuit 9, acting at time IA to the second input of the first trigger 5, resets it to the original the state and the logic level O established on its non-inverting output forcibly keeps the output level of the second trigger 6 in the state of logic 1. Thus, the output of the second trigger 6 forms a single pulse of the logic level O, long Its capacity is equal to one period of the pulse sequence of the controlled generator 4, which is under the control of the voltage stored by the peak detector 3, which stores the voltage reached at the output of the sawtooth voltage generator 2 by the time ti.

Since the output of the trigger 6 is connected to the control input of the key 7, made inverse, for the time T2 ... t4 of the second pulse 6, the key 7 is closed and the generator 8 pulses arrive at the first clock input of the counter 17. The number of pulses transmitted to the counter 17 pulses in time t2 ... t4, forms a code that is fed to the first information input of memory register 18. At the end of the pulse (at time t4) of the second trigger 6 key

7 is disconnected and the code state of the pulse counter 17 is maintained until the next pulse of the measured sequence arrives on the input bus 19 of the device. Since the second control input of the memory register 18 is connected to the inverse output of the first trigger 5, for the duration ti ... t4 of the pulse at its output the memory register 18 stores the state preceding the time ti, which is at times t2. ..t4 does not depend on the changing code that arrives at its first information input. After the logic level 1 is set at the second input of the register 18 of the memory 18, a new counter code 17 is transmitted to its output and, therefore, to the output bus 20, which will be set at the output of this counter after

the end of the counting of the impulse after t4 In addition, at the end of the pulse of the first trigger 5, the pulse generator, which is made controlled, is reset to the initial

the state and the time of action of this pulse at the outputs of the logical key 15 are set to the levels of logical 1, regardless of the code combination received at the first information input

logical key 15 with the second output of the pulse generator 8. In this case, the decoder 14 for the zero code at its input generates a control signal that sets the two-position switch

13 to its original position, in which its output is connected to its first input, which leads to the establishment at the third input of the generator 2 of a saw-tooth voltage of a constant voltage level V 1,

The voltage from the first output of the divider 12, under the action of which the initial voltage Vi is generated at the output of the saw-tooth generator 2 during the time ti. dz (Fig. 2e).

After the moment of time ta, the generator 2 of the saw-tooth voltage forms, at its output, a linearly varying voltage, and the slope of variation of this voltage S, the level of the initial

the voltages Vt and the time interval r must be related by

40

S - 5 ° Go

After some time, if the input sequence pulses U19 are absent at some time ts, the voltage at the output of the generator 2 sawtooth voltage

5 reaches the voltage level Uon of the voltage source 11, while the comparator 10 generates at its output a signal which, arriving at the second input of the saw-voltage generator 2,

0 leads to the establishment at the output of the last voltage equal to the value of the new initial level. This new source level is set by the level of the voltage applied to the third input.

5 of the generator 2 of the saw-tooth voltage from the output of the two-position switch 13, which will be connected to its second input, to which the voltage V2 is fed from the second output of the voltage divider 12, exceeding half

voltage source 11 reference voltage on the value of D V

V2

Don

+ AV

The new state of the on-off switch 13 after the triggering of the comparator 10 will be caused by the fact that a code different from zero is set at the input of the decoder 14, since the pulse of the comparator 10 entering the first input of the pulse generator 8 transfers it to the new state, wherein the code at the output of the latter is incremented by one, and the frequency at its first output is halved. It is this modified code from the second output of the pulse generator 8 through the logical switch 15 to the input of the decoder 14 and to the fourth input of the generator 2 of the sawtooth voltage, causing the generation of its output voltage with a new slope value at time t Comparator 10 by the value of ri AV / Si, from the voltage level / 2 - Uon / 2 + AV, arriving at the third input of the sawtooth generator 2, Similarly, if at subsequent times the pulses Uig of the input sequence absent when when the linearly increasing voltage of the generator 2 of the sawtooth voltage Don of the source 11 of the reference voltage reaches, the comparator 10 triggers again, leading to an increase in the code unit at the second output of the pulse generator 8, a decrease in the frequency at its first output, a decrease in the steepness of the linearly increasing voltage of the generator 2 of the saw-tooth voltage generated from the V2 level with a delay relative to the trigger time of the comparator, defined by the ratio

g - AV, AV i - -Ј-. B | b0

its inverse output, arriving at the third input of the peak detector 3, will switch the latter into the storage mode of the stored input signal level.

The magnitude of the voltage U2 (ti) memorized in peak detector 3 for ts to ts can be defined as

U2 (ti) - Vi + (ti-t3) S0.

Since the time point xs can be defined as

Vi t3- t1 + To t + -X1,

00

TO

U2 (tih vi + (t i-ti- -) S0-t -So,

Bo

i.e., the voltage L) 2 (ti) is proportional to the period T of the pulses at the input of the device with the proportionality factor So, which is a scale factor of the original subband.

For other subranges, the voltage U2 at the output of the generator 2 of the sawtooth voltage at the time AND of the arrival of successive pulses of the input sequence can be determined as follows:

U2 (t i) V2 + (ti-tHi) Si,

where tui is the moment of the beginning of the 1st subrange, during the period of which the next impulse of the input sequence arrives; tHi can be defined as

I1-1

tni ti + tv + Dj + Z TV + ZAtk,

k 1

k 1

Where

.Atk uon

ok

Sk

where I is the number of operations of the comparator (code at the second output of the generator 8).

Thus, at the time ti of the occurrence of the next pulse UIQ of the input sequence (Fig. 2a), which is the distance from the beginning ti of the previous pulse to the value T ti-ti, the voltage of the sawtooth voltage generator U2 (ti) will be fixed in the peak detector 3, since at this moment the first trigger 5 will be cocked and with a signal

Don-Uon / 2-av 2

 is defined as

Uon

-Av

Sk

ets how

Sk

 is defined as

-k

Considering that 2, the magnitude

mm is defined as

i AY (21-1), k 1 ° about k 1io

k "1

Won / 2-doo. y jk

Uon / 2-av

(2-2).

Substitute these expressions for tHi. we have

tHl.t1 + Upu + U | L (2-2) +

JOi. Ooh

(2 -) - 2 +2

+

U

on

-i.uAY.oi

2

Substitute so-called into the expression for U2 (ti) and taking into account that

V2-у1 + А V and Si Se-24 for U2 (ti), we get

U2 (ti) + D V + (ti-ti)

- (ti-ti) Si.

Since the interval T between the pulses of the input sequence is defined as T ti-ti,

U2 (ti) T —So -2H,

i.e., the voltage U2 at the output of the sawtooth voltage generator 2 at the time ti of the arrival of the next pulse of the measured impedance sequence is proportional to the period T with the scale factor Si So 2, and i is the subband number, it determines 8 (Fig. 2c)

F8-F0-2H.

The voltage (ti) from the output of the peak detector 3, entering the input of the controlled oscillator 4 sets its frequency

F, i and -Uz

where a is the proportionality coefficient. During the pulse time of the second trigger with a duration equal to one period T of the pulse sequence of the controlled oscillator 4, the switch 7 passes through the key 7 I;

n Ti Fe

Fo

2-Ooze

Fp-2

 Gr

T-S, -2- "So

tbx

- constant coefficient.

0

five

0

five

0

five

0

five

0

five

The output of the pulse counter 17 after the moment tn {t4) will form a code proportional to the frequency FBx of the input sequence.

Claims (4)

Claim 1. Device for digital frequency measurement according to the author. St. No. 930144, characterized in that, in order to increase accuracy and expand the range of measured frequencies, a comparator, a decoder, a two-position switch, a pulse counter, a memory register, a second differentiating circuit, a voltage source, a voltage divider, a logical a key and a scale bus; a multichannel output of a pulsed reference frequency generator is connected to the multichannel information input of a logical switch, the output of which is connected to the input of the decoder and to the fourth multichannel input of the generator A sawtooth voltage, the second control input of which is connected to the first control input of the pulse frequency generator and the comparator output, the first input of which is connected to the output of the sawtooth voltage generator, a second comparator input connected to the output of the voltage reference voltage source and to the input of the voltage divider, the first and second inputs of which are connected respectively with the perzym normally closed and the second normally open inputs of the two-position switch, the output and the third control The second control input of the pulse frequency reference generator is connected to the control input of the tracking mode of the peak detector, the second control inputs of the memory register and the logical key, and also the input input of which is respectively connected to the third control input of the sawtooth generator and the output of the decoder. with the inverting output of the first trigger, the non-inverting output of which is connected to the input of the second differentiating circuit, the output of which is connected to the second reset input of the pulse counter, the first second clock input, and multi-channel the output of which is connected respectively to the output of the key and to the first multi-channel information input of the memory register, the output of which is connected to the output bus of the device. 2. The device according to claim 1, characterized in that the sawtooth generator comprises a current generator, a reference capacitor, a two-position switch, a code converter, an OR element, an AND element, a delay element and a controlled one-shot, the first input of which is connected to the output the OR element, the first and second inputs of which are respectively the first start input and the second input of the sawtooth generator, the third input of which is the first information input of the two-position switch, the second info The input input of which is connected to the output of the current generator, the control multi-channel input of which is the fourth multi-channel input of the sawtooth generator, the output of which is; The first output of the reference capacitor is connected to the output of a two-position switch, the control input of which is connected to the output of the AND element, the loop input of which is connected to the output of the controlled one-oscillator and to the input of the delay element whose output is connected to the second input of the AND element, The second multi-channel control input of the controlled one-vibration is connected to the second output of the code converter, the first output of which is connected to the control multi-channel input of the current generator, the input of the converter A is the fourth multichannel input of the sawtooth generator, and the second output of the reference capacitor is connected to a zero potential bus. 3. The device according to claim 1, characterized in that the pulse frequency generator includes a multiplexer, a pulse generator, h frequency dividers and a pulse counter, the first count input of which is the first control input of the pulse frequency generator, the second control input which is the second input of the installation to the zero state of the pulse counter, the multi-channel output of which is connected to the control multi-channel input 5 of the multiplexer and is the second multi-channel output of the pulse generator about the frequency of which the first output is the output of the multiplexer, the output of the pulse generator is connected to the first terminal. 0 by the formation input of the multiplexer, the remaining h information inputs of which are connected to the outputs of the corresponding frequency dividers connected in series, and the input of the first divider 5 frequency is connected to the output of the pulse generator. 4. The device according to claim 2, which is based on the fact that the controlled one-shot contains an operational amplifier, a capacitor, two keys, a coding control impedance, a comparator, a source of reference voltages, a logical generator 1 , trigger, non-inverting output of which is connected to the control input of the first 5 is the output of the controlled single-oscillator, the first input of which is the C-input trigger trigger, the inverting output of which is connected to the control input of the second key, the information input of which is connected to the output of the code-controlled resistance with an inverting input of an operational amplifier whose output is connected to an output 5 of the second key, with the second output of the capacitor and with the first input of the comparator, the output and the second input of which are respectively connected to the first R input of the toigger reset and to the first output of the source of reference voltage, the second output of which is connected via the first key to the first analog input of the code control The digital control input of which is the second multi-channel control input of the controllable single-stage resistance, the third output of the voltage source is connected to the non-inverting input of the operational amplifier. L and zero potential bus, and the third information 0 D-input of the trigger is connected to the output of the logical generator 1. U19 and toix .U Out UtB Out ti ..I A I I I III I l / i / H U6 s I-I iJI / 7 out eJ Ohno  I h / 7 L , / | X   / s i i I r i i i I P eleven eleven. four f V I I I I I I I i at III / IxN "/; ti 4 to./ flb.J Wt & 4 m w yy Uh M 5 igv, AWЈ / I IN / J7 out FIG. 7 one j out ", Ln A / | I p mZya. one P one P / 1 t3 / g / 5 b t7 te FIG. eight FIG. 6 FIG. 7 one  L BUT i one one P P "And