SU1370646A1 - Time interval calibrator - Google Patents

Abstract

The invention can be used to calibrate the phase and time errors of phase meters and time interval meters. The kalnbator contains a generator 1, control blocks 2 and 3, frequency dividers 4 and 5, blocks 6 and 7 of phase-locked loops, shapers 8 and 9 pulses, and a reference oscillator 10. Introduction of control device 11 comparing device 12, time meter 13, triggers 14 and 15 and the formation of new functional connections improves the accuracy of the calibrator by eliminating drift, zero channels. 4 il. I (L

Description

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h

about

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Fig.G

ten

AND

The invention relates to a pulse technique and can be used to calibrate the phase and time errors of phase meters and time interval meters.

The purpose of the invention is to improve the accuracy of the time calibrator by eliminating zero channel drift.

Figure 1 shows the block diagram of the calibrator time intervals; Fig, 2 - plot of the input and output signals of the triggers supplied to the inputs of the meter time intervals; in fig. 3 is a control device diagram; on . 4 - voltage diagrams for the operation of the calibrator blocks.

The time interval calibrator contains the generator 1, the control units 2 and 3, the dividers 4 and 5 frequencies, the blocks 6 and 7 of the phase-locked loop (PLL), the formers 8 and 9 pulses, the reference generator 10, the control unit 11, the comparison device 12 , the meter 13 time intervals and triggers 14 and 15. The output of the generator 1 is connected to the first inputs of blocks 2 and 3 of the control unit 2 output of the controller 1 through a frequency divider 4 frequency connected to the first input of the block 6 FALCH, the output of which is connected to the driver 8 pulses whose output is connected to ne The first output of the calibrator and the first input 35 of the trigger 14, the output of the control unit 3 through the frequency divider 5 is connected to the first input of the 7 PLL unit, the output of which is connected to the input of the pulse shaper 9, the output of which is connected to the second output of the calibrator and the first trigger input 15, the output of the reference generator 10 is connected to the second inputs of the flip-flops 14 and 15, the control inputs of the blocks 6 and 45 7 of the PLL clock input of the meter 13 time intervals, the clock and bit outputs of which are connected to the corresponding inputs of the comparison device oystva 12, whose output 50 is connected to the respective inputs of the blocks 2 and 3 of the control outputs of the controller 11 are connected to respective inputs of the blocks 2

18, decoder 19 and digital indicator 20.

The time slot calibrator works in the following 1M manner.

Blocks 1-5 form a low-frequency phase-shifting device, at the output of which there are two coherent signals, the phase shift between which is controlled in discrete increments of 21 / li, where N is the division ratio of dividers 4 and 5 in the O-27 | The phase shift set at a low frequency is then transferred to a high frequency using a two-channel PLL of blocks 6 and 7 and a reference oscillator 10. The output high-frequency signals of blocks 6 and 7 of the PLL are fed to the shapers of 8 and 9 pulses between the edges of their output pulses time interval adjustment is performed. The time interval 25 set at high frequency is transformed with the help of flip-flops 14 and 15 to a low intermediate frequency

f

Frequency converter

 f

Bich

- f.

where f

OUT

- frequency of the output PLL; f Pr - the frequency of the reference signal

generator 10.

In this case, the magnitude of the time shift at an intermediate frequency is K times the specified calibrated time shift

To

 6IK

to f,

Jf

- coefficient

where 1 is J., - |, c

time transformations in trigger

Converter x.

The plots of input and output signals of trigger frequency converters are shown in FIG. 2, where U j ,,, is the signal at one trigger input; U - signal at the other input of the trigger;

and.

- intermediate frequency voltage at the output of the flip-flops.

The trigger signals 14 and 15 are fed to the inputs of the time interval meter 13, which is a conventional phase shift converter - time interval -

and 3 controls and inputs comparing 55 DIGITAL code. The high-frequency time meter 13, necessary for the working device 12.t.

The control device I1 consists of a reference generator 10 per clock and consists of buttons 16 and 17 of the reversing counting input of meter 13. Digital

0

AND

20 30 35 40 45 50

18, decoder 19 and digital indicator 20.

The time slot calibrator works in the following 1M manner.

Blocks 1-5 form a low-frequency phase-shifting device, at the output of which there are two coherent signals, the phase shift between which is controlled in discrete increments of 21 / li, where N is the division ratio of dividers 4 and 5 in the O-27 | The phase shift set at a low frequency is then transferred to a high frequency using a two-channel PLL of blocks 6 and 7 and a reference oscillator 10. The output high-frequency signals of blocks 6 and 7 of the PLL are fed to the shapers of 8 and 9 pulses between the edges of their output pulses time interval adjustment is performed. The time interval 25 set at high frequency is transformed with the help of flip-flops 14 and 15 to a low intermediate frequency

 f

Bich

- f.

where f

OUT

- frequency of the output PLL; f Pr - the frequency of the reference signal

generator 10.

In this case, the magnitude of the time shift at an intermediate frequency is K times the specified calibrated time shift

To

 6IK

to f,

Jf

- coefficient

where 1 is J., - |, c

time transformations in trigger

Converter x.

The plots of input and output signals of trigger frequency converters are shown in FIG. 2, where U j ,,, is the signal at one trigger input; U - signal at the other input of the trigger;

and.

- intermediate frequency voltage at the output of the flip-flops.

The trigger signals 14 and 15 are fed to the inputs of the time interval meter 13, which is a conventional phase shift converter - time interval -

The code in the measurement time shift between the output signals of the flip-flops 14 and 15 from the code output of the meter 13 is fed to a comparison device 12, in which it is compared with the predetermined control unit 11 of the digital code A, the nominal value of the time shift. The diagram of the comparison device 12 is shown in FIG. The number of parallel-connected bits consisting of the logical elements NOT and AND depends (as well as the size of the time interval meter 13 and the control device 11) on the required resolution of the drift correction device. The correction cycle time also depends on the number of bits. The more precisely the time interval is required, the more bits are needed for the correction device. The clock signal is fed to the output elements AND from the clock output of the time slot meter 13. From the output of the device 12 with the frequency of the correction cycle, correction pulses arrive at the second inputs of the control units 2 and 3. If the number is A B, then the control unit of one channel, if A: B - to the block of another, until the codes A and B are equal. At the same time, the cycles of the correction cycles are much longer than the transients in the phase setting device and the PLL to prevent the correction processes influenced the setting of the calibrated time interval.

When the button is pressed, the control device 11 arrives at the control unit 2 or 3 and at the summing or subtracting inputs of the reversible counter, at the output of which digital code A is generated, which arrives at the comparison device 12 and at the indicator used for registering the value of the specified time interval .

Blocks 3 and 2 of the control may consist of a single-shot one-shot trigger and a matching circuit. When a pulse control is applied to the input of the one-shot from the control device 1 1 or from the comparison device 12, a strobe pulse is generated that eliminates a single pulse in the input pulse sequence of the coincidence circuit. The work is illustrated by the diagram in FIG. 6,

where Up is the signal of the generator 1 correction pulse comparison device 12; U ,, y - impulse control device 11; B — strobe pulses of the one-shot of the block 2 or 3 controls; U is a signal at the input of a divider of 4 or 5 frequencies with a eliminated pulse; U i - the signal at the output of the frequency drops during elimination

five

0

five

0

five

0

0

pulse input; U is the signal at the output of the frequency divider without eliminating pulses at the input; , is the time shift set at low frequency.

Claims (1)

Invention Formula A time calibrator containing a generator, two control units, two frequency dividers, two phase-locked loops, two pulse shapers, the generator output is connected to the first inputs of the first and second control blocks, the output of the first control block is connected to the first block through the first frequency divider Phase-locked frequency, the output of the second control unit through the second frequency divider is connected to the input of the second block of the phase-locked loop, the output of the reference generator is connected With the second inputs of the first and second phase-locked loops, the outputs of the first and second pulse formers are calibrator outputs, different in that, in order to follow the time calibration accuracy by eliminating zero drift in the channels, two triggers are entered into it , a time interval meter, a comparison device and a control device, with the first inputs of the flip-flops connected respectively to the outputs of the pulse shapers, the second inputs of the flip-flops are connected to the output of the reference generator and the first input of the time interval meter, the second and third inputs of which are connected to the corresponding outputs of the first and second triggers, the code outputs measure 5 liters of time intervals connected to the first inputs of the comparison device, the second inputs of which are connected to the corresponding outputs of the control device, the second output five which is connected to the second input of the first control unit, the third input of which is connected to the first output of the comparing device, the second output of which is connected to the third input of the second control unit, secondly p p p p p p p p n, f  I PIP. w I Logical level jg effawvu / GiC Kn2 K 6 UZ Fig.Z The main input of which is connected to the second output of the control device, the second output of the time interval meter is connected to the clock input of the comparison device. PIP. FIG. 2 f, K (PKVA P ppppppp Psi USA P ppppp and. W nnnnnj pppp 9OUT  FIG. k