SU1368876A1 - Random number generator - Google Patents

Abstract

The invention relates to computing and can be used to generate random numbers with an arbitrary distribution law, for example, when building electronic models of a communication system. The purpose of the invention is to increase the speed of the generator. The goal is achieved by introducing into the generator the element AND, the block of elements AND, the memory block and the accumulating adder-subtractor. The generator provides a small number of steps to form each random number. 3 il.

Description

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The invention relates to computing and can be used to generate random numbers with an arbitrary distribution law, for example, to build electronic models of a communication system.

The purpose of the invention is to increase the speed of the generator,

FIG. 1 shows a structural-functional diagram of a random number generator; FIG. 2 - functional diagram of the accumulating totalizer subtractor; in fig. 3 - random number generation algorithm.

The generator contains a generator of 1 clock pulses, a switch 2, a counter 3, a block 4 of memory, an accumulator adder-subtractor 5, a block

6 in order, generator 7 pseudo-random numbers, block 8. Comparison, the elements OR 9 and 10, the element 11 and the block elements And 12.

Accumulation adder-subtractor 5 contains subtractor 13, adder 14, delay elements 15 and 16, elements AND 17 - 19, elements OR 20 and 21, register 22.

The generator works as follows.

P the initial state in the generator

7 pseudo-random numbers set the mode of once forming uniformly distributed random numbers at a given interval m,. Memory block 6 contains codes of numbers corresponding to the upper values of each m-th segment (, N) into which the interval of MQ codes, M, is divided. In this case, the length of the m-th segment is proportional to the probability of occurrence of a random number O at a given interval.

In block 4 of memory, binary codes of the values of the function defining the law of convergence are written, for example

M

N

where i 2, K; N 2

2

K is the number of iterations required for searching with a given accuracy of the nth segment, which has got the value of a random number Q. Binary code corresponding to the number 2 of the interval interval m, m is fed to the input B of the accumulating adder-subtractor 5.

At the beginning of the operation, the initial setting pulse Sj zeroed the counter 3. In addition, the pulse d through

the element OR 10 is fed to the input of the generator 7, the first random number is set at its output and to the input of the initial installation of the accumulating adder-subtractor 5. In the adder-subtractor 5, the pulse S opens element AND 19, allowing the Bj code to be written through the element OR 21

in the register 22. Simultaneously impulse. S through the element OR 20 enters the clock input of the register 22, writes the code B to the register 22. The output of the register 22, which is the output of the adder-subtractor 5, and, therefore, the binary code of the number B is set at the address input of the memory block 6 equal to A (-).

When the switch closes 2 clock pulses S; from the output of the generator 1 is fed to the counting input of the counter 3, which generates codes 9; Which are the address of the corresponding memory cells of block 4. Pulses 8; arriving at the synchronization of block 6, the contents of the b; -x cells of block 6 are read into

the second input of the comparison unit 8; The latter compares the code AA (M |) at the output of block 6 of the permanent memory and the code Q at the output of the pseudo-random number generator.

If condition A (K;) Q is satisfied, then a signal of a logical unit j is formed at the output of More than block 8

Compare.

At the same time, impulse 1 is fed through the ICD element 9 to the synchronization input of memory block 4, from the output of which code A (M, -,)

The new number M; the address of which is formed at the output of the counter 3. The code A A (M;) from the output of block 4 is fed to the output of block 5, at this point in time the pulse | arrives

at the first input of the task of the adder-subtractor 5 mode, while the pulse | is fed to the clock input of the subtractor 13, to the first input of which from the output of the register 22 enters

the previous is the value of code A (M;); to the second input, the current value of code A (M; +,).

The clock pulse is used to form the code of the number M;

 m - dm - 2 ..; -:

2

2

2

The pulse delayed by the delay element 15 at the response time of the subtractor 13 opens the element AND 17 and simultaneously through the element OR 20 enters the clock input of the register 22, whereby the output of the AC code is read from the output of the subtractor 13 and written to the register 22.

When the memory of block 6 of the next clock pulse 5; + arrives at the synchronization input, the code A (M ;,) formed in the accumulating adder 5 of the address 5 reads the contents of the corresponding memory cell of the memory 6 to the second input of block 8 comparison, in which the following comparison operation is performed.

If A (;) O, then a logical unit signal is generated at the first output of the comparison unit 8.

The formation in the adder-subtractor 5 of the next segment of the histogram is carried out similarly to the first case, but the code of the number;,., Is formed in the adder 14.

M

  + LM

 3..

Further search for a random number is carried out similarly.

When the overflow pulse appears at the output of the counter 3, the search for a random number ends: the pulse through the element 11 11 opened at the second input arrives at the second input of the element 12 allowing the reading of code A (M ,, Q from the output of the subtractor to the output of the device).

Simultaneously impulse | enters through the element OR 10 to the input of the generator 7 pseudo-random numbers and sets the next random number Q in it, and the adder-calculator 5 sets it to the initial state. Thus, Hefiojiijiiioe provides the number of steps

68876

ticks K to form each random number.

Claims (1)

Claim 5 A random number generator containing the first memory block, the rtJHcpor of pseudo-random numbers, the comparison block, the first and second elements OR, Q clock generator, the output of which through the switch is connected to the counting input of the counter, the first input of the first element OR is the input of the initial setup 15 of the generator, the output of the first element OR is connected to the input. The start of the pseudo-random number generator, the output of which is connected to the first information - the input of the comparison unit, the second information input of which connected to the output of the first memory block, characterized in that, in order to improve speed, an AND element is entered into it The 25 And elements, the second memory block and the accumulating adder-subtractor, while the outputs More and Less than the comparison unit are connected respectively to the first and second inputs of the accumulating adder-read mode, outputs More and Less than the comparison unit are connected respectively to the first and second inputs of the second the OR element, the output of which is connected to the synchronization input of the second memory unit and to the first input of the first AND element, the output of which is connected to the second input of the first OR element, output Q of which is connected to the input of the initial installation of the accumulating adder-subtractor, the output of which is connected to the address input of the first memory block, the synchronization input of which g is connected to the synchronization input of the comparison unit and connected to the counter input of the counter, the overflow output of which is connected to the second input of the element AND whose output is connected to the first input of the block of elements AND whose output is the output of the random number generator connected to the output of the adder-subtractor output A counter 55 is connected to the address input of the second memory block. 35 0Ь / Ж. L fieL FIG, g (Start 3 i: d.