SU1304015A1 - Device for sorting numbers - Google Patents

Abstract

The invention relates to computing. The purpose of the invention is to expand the functionality by providing the ability to count the number of numbers that satisfy the criteria of equal, more, less, no more and no less. The device contains memory blocks (PSUs), a register, an arithmetic logic unit (ALB) and a control unit (CU), which provides firmware control of the device blocks. In each cell of the first PSU, the number of numbers in the array is equal to the address of this cell, for which upon receipt of the next 1 st day a, - the number recorded at the address a is read from the power supply unit, a unit is added to it and then it is written to the same address. To sort the numbers by the criterion more (less) or not more (not less), the sum of the numbers in the cells with addresses from the specified A to inclusive is calculated. Addition is performed by the ALB, the result is recorded in the PSU. 1 hp f-ly, 2 ill. with $ (L 00 about 4

Description

The invention relates to computing and can be used in specialized computers, data processing devices and information sorting devices.

The purpose of the invention is to expand the functionality by providing the ability to count the number of numbers that satisfy the criterion equal, more, less.

no more and no less.

FIG. 1 shows the scheme of the proposed device; in fig. 2 is a control block diagram.

The device for sorting numbers contains memory blocks 1, 2, register 3, arithmetic logic unit 4, control unit 5, bus 6 input-output, clock input 7.

The control unit contains an array length counter 8, a state register 9, a multiplexer 10, a microcommand address register 11, a ROM 12, a microcommand register 13, a pulse driver 14, an information input 15, a clock input 16, an input 17, outputs 18-21 controlling the register, the first, the second memory block and the arithmetic logic unit, respectively. On the 30th, condition A i a,

numbers follow the clock signals on input 7. The same clock signals through the driver of 14 pulses provide sampling

 regular microcommands from ROM 12.. Each newly arriving i-e number a- arrives at the address inputs of memory block 2. The code read at the address is added arithmetic-logic

A block 4 with the number 1 or any other number, called a scaling factor, stored in one of the cells of the memory block 1, is again written into the memory block 2 through the volume.

t5 same address a j,

Thus, after receiving the entire array (which is recorded by the appearance of a zero in the counter 8 of the array length, the content of which decreases with each arrival of a new number), at address a, (and 1.2 ... M, where M is the capacity of ti 1) there will be a number in the array of numbers equal to a. This is where the counting and sorting of numbers according to the criterion equally ends.

To count the number of numbers that satisfy the criterion of not more than

or not less, i.e. such for ko- or a-a

Max.

need to perform

The device for sorting numbers allows counting the number of numbers equal to a given one, less than (more) than specified and not smaller (not larger) than given. The operation of the device is controlled by the firmware: the next micro-command is selected from the ROM 12 at the address determined by the contents of the micro-command address register 11, and placed in the micro-command register 13. The contents of certain bits of the register 13 are fed to the address inputs of memory block 1 and the control inputs of memory block 2, register 3, and arithmetic unit 4.

The sorting mode is set on a bidirectional I / O scale 6 by specifying the starting address of the firmware for sampling numbers according to the criterion is 50 in counter 8. After that, but more, less, not more, the content is added to less than less. This address comes in memory block 2, starting at

 Mitch ° A addresses inclusive (total addition). Resume the contents of all cells of unit 2, starting with A and older, and write the result into cell A, „„,. Do this one by one.

Jj rflflH

operation for all cells with addresses not larger than A. You can get an array sorted by this criterion.

40 To do this, determine the number of cycles of this stage, for which code A is read from memory 1 (for example, the maximum address of memory 2, or any other larger

45 than A), which arrives unchanged through the arithmetic logic unit 4 and into register 3, then the value A. is read out from it of memory 1, A. ". , the result is recorded

through the multiplexer 10 into the register 11 addresses of the microinstruction. The next step is to receive the length of the sorted array 55, written to address A. in the counter 8 are the lengths of the array, and in whose numbers, the sorting by the criterion of the memory block 1, the working constants, more and less of which, the anavelies of which depend on the sort mode. After that on the bus 6

condition A i a,

numbers follow the clock signals on input 7. The same clock signals through the driver of 14 pulses provide sampling

the next microcommand from the ROM 12. Each newly arriving i-e number a- arrives at the address inputs of the memory block 2. The code read at the address is added arithmetic-logic

a block 4 with the number 1 or any other number called by the scaling factor stored in one of the cells of the memory block 1, and again written into the memory block 2 through the volume

same address a j,

Thus, after receiving the entire array (which is recorded by the appearance of zero in the counter 8 of the array length, the content of which decreases with each arrival of the new number), at address a, (and 1.2 ... M, where M is the capacity of the memory block 1) there will be a number in the array of numbers equal to a. This is where the counting and sorting of numbers according to the criterion equally ends.

To count the number of numbers that satisfy the criterion of not more than

condition A i a,

or not less, i.e. those for which condition A i a is fulfilled,

- or a- A

Max.

need to perform

50 into counter 8. After this, the contents of the memory block 2 are added, starting with the address

summation of the contents of all cells of unit 2, starting with A and older, and writing the result into cell A, „„,. Consistently doing this

Jj rflflH

operation for all cells with addresses not larger than A. You can get an array sorted by this criterion.

40 To do this, determine the number of cycles of this stage, for which code A is read from memory 1 (for example, the maximum address of memory 2, or any other larger

45 than A), which arrives unchanged through the arithmetic logic unit 4 and into register 3, then the value A. is read out from it of memory 1, A. ". , the result is recorded

logically, however, the number of additions in the counter 8 is set to (A

-A) and the calculation is performed by us "

before

the rank from a cell with an address from A., A. for a mode is larger and the cell with an address from A to A is for a mode less. The result is written in cell A |.

Claims (2)

1. A device for sorting the numbers, comprising two memory blocks, a register and a control unit, wherein the control outputs of the first memory block of the control unit are connected to the address inputs and control inputs of the mode of the first memory block, characterized in that in order to expand the functionality by providing the possibility of counting the number of numbers that satisfy the criterion is equal to, more, less, not more, not less, an arithmetic logic unit is entered into it, and the information bus of the device connected The output of the arithmetic logic unit, the address and data input of the second memory block, the information input of the register, the first memory block and the control unit, the clock input of which is the clock input of the device, the outputs of the register control, the second memory block and the arithmetic - logically, the control unit block is connected respectively to the register recording resolution inputs, the mode selection input of the second memory block and the input of the operation task of the arithmetic logic unit, the first information input of which is connected to the output n the first- blka memory and outputs the same name of the second block memory and registers are combined and connected to the second data input of the arithmetic logic unit, the overflow outlet  , 10) 5 20 - 25 30 .j 40 45 which is connected to the input Error of the control unit. 2. Device POP.1, characterized in that the control unit contains an array length counter, a status register, a multiplexer, a microcommand address register, a persistent storage, a microcommand register and a sync pulse generator, the information input of the control unit being connected to the first information the multiplexer input and information input of the array length counter, the bit outputs of which are connected to the group of information inputs of the status register, the outputs of which are connected to the second information input m multi-alexor, the output of which is connected to the information input of the address register of the micro-command: whose output is connected to the address input of the permanent storage device, the first and second groups of outputs of which are connected respectively to the third information input of the micro-commands, the outputs respectively. the leading bits of which are, respectively, the outputs of the control register, the first and second blocks of memory and ari (| the logic control unit, as well as the "connected to the control inputs of the sync pulse generator, multiplexer, array length counter and status register, whose information input is the input of the control unit error, the output of the sync pulse generator is connected to the synchronization inputs of the micro-address register and the micro-register register, the clock input of the control unit is connected to the clock input of the sync pulse generator. Compiled by V. Gorokhov Editor M. Bandura Tehred M. Khodanich Proofreader A. Zimokosov Order 1312/49 Circulation 673 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4