SU1302255A1 - Polyphase pulsed stabilizer - Google Patents

Abstract

The invention relates to electrical engineering and may be used as a source of secondary power supply of various electronic equipment. The purpose of the invention is to improve the quality of the control process while at the same time increasing the reliability of the multi-phase pulse stabilizer and reducing its mass and volume. The multiphase pulse stabilizer contains a power unit, made in the form of N parallel-connected converter cells 14, and a control unit. A change in voltage at load 15 causes a change in voltage at the output of the comparison node 1 1 and a change in pulse at the output of the modulator 3. This leads to a time shift of the signal, aa at the output of trigger 10, and a change in the energy transmitted by cells 14 to load 15 compensating voltage change. 2 Il. SO with about N :) GcheE Sa sd Phi, 2.1

Description

The invention relates to electrical engineering and can be used as a source of secondary power for various electronic equipment.

The aim of the invention is to improve the quality of the control process while improving reliability and reducing mass and volume.

FIG. 1 shows a functional circuit of a multiphase pulse stabilizer; in fig. 2 - timing diagrams explaining the operation of a multiphase pulse stabilizer.

The multiphase pulse stabilizer contains a generator of 1 clock pulses, a driver of 2 clock pulses of a pulse-width modulator, a pulse-width modulator 3, an N-bit shift register 4, a HE element 5, a standby generator trigger 6, a standby generator 7, a counter separator 8, pulse decoder 9, N trigger triggers 10, comparison node 11, voltage source 12, power source 13, N power conversion cells 14, load 15, and strobe pulse driver 16.

The converter cells 14 are connected by power inputs to the inputs, terminals for connecting power supply 13, power outputs are connected to output terminals for connecting load 15, and control inputs are connected to outputs of control flip-flops 10. The comparison node 11 is connected to the output terminals by the first input, the second input is connected to the output of the source 12 of the reference voltage, and the output is connected to the first input of the pulse-width modulator 3, the second input of which is connected to the output of the generator 2 of the pulse width of the pulse-width modulator, the input of which is connected to the generator 1 clock pulses.

The information input of the N-bit shift register 4 is connected to the output of the pulse-width modulator 3, its synchronization input is connected to the output of the sync pulse generator 1, and the outputs are connected to the synchronization inputs of the corresponding control triggers 10. The output of the pulse-width modulator 5 through the element NOT 5 is connected to the synchronization input of the trigger 5 control of the waiting generator. The information input of the trigger 6 is connected to the common bus, and the setup input is connected to the N-1 output of the descrambler 9 pulses. The inverse output of the trigger 6 is connected to the control input of the waiting generator 7, and its direct output is connected to the installation input in "About the counter-divider 8, the counting input of which is connected to the output of the waiting generator 7 and through the gate generator 16 to the pulse decimator 9 is connected to the outputs of the splitter counter 8, and its outputs are connected to the installation inputs of the corresponding control trigger 10, info

Matrix inputs of which are connected with a common length.

The voltage plots (Fig. 2) are as follows: a - output of the generator 1 clock pulses; b - output of the imager 2 synchronization pulses of the pulse-width modulator; в - output of pulse-width modulator 3; g - the output of the element is NOT 5; D is the inverse output of the trigger 6 for controlling the generator 7; е - output of the waiting multi10 vibrator 7; W - the gate driver output 16 strobe pulses; h - output “About the decoder 9 pulses; and - output "1 decoder 9 pulses; k - N-1 debristor output 9 pulses; l - output of the 1st bit of register 4 shift; m - the output of the 2nd time 5 p yes register 4 shift; n is the output of the Nth bit of register 4 shift; о - output of the 1st control trigger 10; n - output of the 2nd trigger 10 control; p - output of the N-ro trigger 10 control.

 Multiphase switching regulator operates as follows.

From the output of the generator 1, there are voltage pulses with a period Tgsi T / N, where T is the period of co-mutation of the power converter cells 14; N - the number of power

25 converter cells (phases) in a multiphase pulse stabilizer are fed to the input of the throttle 2 synchronization pulses of the pulse-width modulator and to the synchronization input of the N-bit register 4 of the pulse shifting.

30 From the time t 0 (Fig. 2c) to the time t t and the equality of the voltages supplied to the pulse-width modulator 3 from the driver 2 synchronization pulses of the pulse-width modulator and the comparison circuit 11, on

35 of the output of the pulse-width modulator there is a high level of the logic signal, the duration of which is proportional to the difference between the output voltage taken from the load of 15 polyphases .J. pulsed stabilizer, and the voltage of the source 12 of the reference voltage. The synchronization pulses received at the synchronization input of the register of 4 shift by synchronization pulses are sequentially switched on at regular time intervals (Tgc).

45 bits 1, 2, ..., N (Fig. 2 l, m, o) of register 4 shift to a high level state of a logic signal. An impulse transition O-1 formed at the output of each bit of the shift register 4 at the same time triggers the trigger.

50 of the control (Fig. 2, p, p) and the power converter cell 14 connected thereto to a state in which energy from the source 13 is transferred to the load 15.

At the time t tn, a low-level logic signal appears at the output of the pulse-width modulator 3, which, as it arrives at the synchronization input of the shift register 4 of the next sync pulse, is sequentially written into bits

55

1 - N shift register 4 and simultaneously, having passed through element 5, front O-1 (Fig. 2 g) switches on trigger 6 to the state in which the standby generator 7 and counter-divider 8 unlock (the inhibitory potential is removed from the installation input ABOUT). The counter-divider 8 starts counting the pulses arriving at its input from the standby generator 7 (Fig. 2e), the period of which is equal to the period of the sync pulse generated by generator 1.

The strobe pulse shaper 16 generates short pulses from the output pulses of the standby generator 7 for tuning the pulse finder 9 pulses, the information inputs of which receive signals from the corresponding parallel outputs of the splitter counter 8. From the outputs of the O- (N-1) decoder 9 pulses, the output pulses pulses equal in duration to the strobe-pulses of the strobe-pulse shaper 16 are supplied to the installation inputs from the 1st to the Nth control trigger 10, respectively, thus producing a sequential switching off of the trigger 10y of the control transducer cells 14 connected thereto. From the N-1 output of the decipheror 9, the output pulse simultaneously switches off the N-ro of the control trigger 10 and turns off the control trigger 6 of the waiting generator, which is then blocked, and the counter-divider 8 is set to the initial, zero condition.

At time O, the output of the pulse-modulator 3 is again set to a high level of the logic signal and the cycle of forming a multi-phase NIS to control the power converter cells is repeated.

The power converter cell 14 generally includes a key element and a D-L-C type power filter. The specific scheme of connecting the elements of the power converter cell among themselves is determined by the requirements for the output voltage of the multiphase pulse stabilizer.

The change in voltage on the load 15 of a multiphase pulsed stabilizer under the influence of any disturbing effect leads to a change in voltage at the output of the comparison node 11 and a corresponding change in the pulse generated by the pulse-width modulator 3. This leads to a shift in time of the multiphase signal at the output of the trigger 10 control, and the change in energy transmitted by the power converter cells 14 to the load 15, thus compensating for the change in voltage across the load.

Claims (1)

Invention Formula A multiphase pulse stabilizer containing a power node made in the form of N parallel-connected converter cells, the inputs connected to the input, and the outputs to the output terminals, and a control unit connected to the output terminals, and the / V-output connected to control inputs 0 converter cells and a sync pulse generator, a pulse width modulator synchronization pulse generator, a / V-bit shift register, a reference voltage source, a reference node, a pulse width modulator, a gate pulse generator, and / V control flip-flops, with the output of each control flip-flop connected to the corresponding output of the control unit, one of the inputs of the comparison node Q is connected to the input terminal of the control unit, and the other is connected to the output of the voltage source, output knots. 1a is connected to the first input of the pulse-width modulator, the second input of which is connected to the output of the synchronization pulse generator of the pulse-width modulator whose output is connected to the information input of the N-bit shift register, the outputs of which are connected to the synchronization inputs of the corresponding trigger points control, the sync pulse shaping input of the pulse-width modulator is connected to a clock generator output, characterized in that, in order to improve the quality of the process control with simultaneous increase in reliability and weight reduction  and volume, the logical element NOT, the trigger control of the waiting generator, the waiting generator, the counter-divider by L, and also the impulse delimiter for N directions are inputted to it, and the sync pulse pulser ESCAH is connected to the synchronization input of the -shift shift register, to the information input which is connected to the input of the logical element, the output of which is connected to the synchronization input of the control trigger of the waiting generator. 5, the information input of the trigger control of the waiting generator is connected to the common wire, the inverse output is connected to the control input of the waiting generator, and the direct input is connected to the installation input in “About counter-divider to L /, the counting input of which is connected to the output of the waiting generator and input of the generator the strobe pulses, the output of which is connected to the input of the gating of the pulse tuner to N directions, the information inputs of which are connected to the corresponding information outputs of the counter divider by L, and the outputs are connected to the device Assigning the inputs to the corresponding control triggers, the information inputs of which are connected to the common wire, the yV-1 output of the decoder impulse t owl is connected to the installation input of the trigger trigger control generator. te.2