SU1292039A1 - Device for fetching multivalued answer from associative memory - Google Patents

Abstract

The invention relates to computing, in particular to storage devices, and can be used in reading information from associative storage devices of large capacity. The purpose of the invention is to expand the functionality of the device by ensuring that the numbers are read in priority, i.e. implementation of the function of memorizing the numbers of previously read words and their subsequent exclusion from a multi-valued answer. The device contains a search result register, first and second coding units, a pulse distributor, a local control unit, three groups of AND elements, an AND element, communication elements made in the form of diodes, and a buffer number register. The device reads the contents of all the cells of the accumulator of the associative memory found as a result of the search, in order of increasing (decreasing) of their addresses 3 Il. se (L

Description

fO

f5

The invention relates to computing, in particular, to storage devices, and can be used when reading information from a large amount of associative storage devices (AMS).

The purpose of the invention is to expand the field of application of the device by ensuring the reading of numbers in priority

FIG. 1 shows a block diagram of the proposed device; FIG. 2 and 3 are schematic diagrams of the first and second coding units, respectively, by the example of an eight-word ACC. The device for extracting a multi-valued response from the associative memory (Fig. 1) contains the search result register 1, the first 2 and second 3 coding blocks, the local control unit 4, the first group of elements AND 5, the AND element, the distributor 7 pulses, having an input 8, a second group of elements AND 9, a third group of elements AND 10, communication elements made in the form of diodes 11, and a buffer register 12 numbers. Figure 1 also denotes the inputs 13 and 14 of the device and the outputs 15-17 of the device.

Coding unit 2 (Fig. 2) contains an input 18 and an output 19 of a group of buses, on the cross of which there are communication elements, in particular diodes 20, in accordance with the chosen 35 coding system, the output group of buses 19 through resistors 21 is connected to the bus 22 zero potential.

Similarly, block 3 (Fig. 3) consists of input 23 and output 24 groups

20

25

thirty

40

Dips 25 included in the crossroads x of the input 23 and output 24 buses according to a given coding system, resistors 26 connecting the output bus group 24 to the zero potential bus 22.

The device works as follows.

In the initial state, let a multivalued response from the CCD be recorded in register 1 at input 13 of the device, in which, for example, state 1 has the second, fifth and sixth bits of all bits of register 12 set to state O, and block 4 there is a signal that permits the passage of clock pulses (TI)

O

five

five

0

five

0

0

f (a input of the distributor 7. Otherwise, in the absence of a coincidence signal after an associative search (all register bits 1 have an O state) the block

4 prohibits the passage of TI into the device.

The operation of the device begins with the arrival of the first TI to the input 14. At the same time, the signal 1 from the output of the first bit of the distributor 7 does not change the signals at the output of the register 12, since all bits of the register 12 are reset. In the second cycle, the signal 1 from the zero bus 19 of block 2 through the first element And 5 enters the zero bus 23 of the block Bp, which leads to the installation in the state O of the bits of the register 1. With the arrival of the third TI, a similar circuit is installed in the O. Yes

Register 1, with the difference that the setup signal in Q passes through the second element And 5. At the next fourth clock cycle, the state of the bits in register 1 does not occur.

With the arrival of the last (fifth) TI, a signal appears at the device output 17, which is used to read information about the allocated line and its number code, respectively, from the device outputs 15 and 16. At the same time on this clock cycle, through elements AND 9 writes the contents of register 1, which is a so-called vector of the active line, into register 12. Thus, the register 12 records the number of the line that was allocated on the first sample cycle.

Multiple Answer.

The subsequent Sample cycles begin with the restoration in register-1 of the original multi-valued response from

 Azu. With the arrival of the next TI signal 1 from the output of the first bit of the distributor 7, through the elements 10 and 10, according to the state of the bits of the register 12 E), the prohibition signals on the output of the diodes 11, which through the output group of buses 24 of the block 3 reset into O register bits 1. Thus, in register 1, at this cycle, the previously selected active lines on the previous search of the sample are eliminated (in the considered example, setting is made in O of bit 6 of register 1). The subsequent M cycles (where M is the number of columns of the diode arrays of blocks 2 and 3) allow the next priority row to be selected from the multivalued answer (in our example this is section 5 of register 1) in the described manner. At the final (M + 2) -th cycle of this sampling cycle, the next active line and its code are read by the signal from output 17 at the outputs 15 and 16 of the device, respectively, and the state of register 1 in register 12 is simultaneously recorded through AND 9 elements (in races

In the considered example, the register pointer 1 is set to 1 bit 5 of register 12) according to the new vector. Thus, in register 12, information about already allocated lines is accumulated.

one

The sampling cycles described are repeated for each of the strings included in the multivalued answer. The completion of the processing of a multi-valued response. The response is the same state of the buffer register 12 and register 1 of the search result. At the same time, at the next TI signal 1 from the output of the first bit of the distributor 7, the register 1, forming a multi-valued response, is set in O. The zero state of register bits 1 causes block 4 to prohibit TI, and the device shuts down.

Claims (1)

Invention Formula A device for extracting a multi-valued response from an associative memory containing a search result register, first and second coding units, first AND group, pulse distributor, And element and local control unit, input 5 15 20 25 -5 40  iToporo and the input of the first coding unit are connected to the output of the search result register, the first input of which is one of the device inputs, one of the outputs of which are the outputs of the first coding unit, the first input of the AND element is connected to the output of the local control unit, the second input element I is another input of the device, and its output is connected to the input of the pulse distributor, one of the outputs of which is connected to the first inputs of elements AND of the first group, the second inputs of which are connected to the outputs of the first block an and outputs are connected to one of the inputs of the second coding unit, the output of which is connected to the second input of the search result register, the output of which is 51 another output of the device, characterized in that, in order to expand the field of application of the device by ensuring the reading of numbers by priority , the second and third groups of elements I are entered into it, the communication elements made in the form of diodes, and the buffer register of the number, one of the inputs of which is connected to the output of the search result register, the other inputs are connected to the outputs And the second group, inverse and direct outputs of the buffer number register are connected to the first inputs of elements 11 of the second and third groups, respectively, the second inputs of elements H of the second and third groups are connected respectively to other outputs of the pulse distributor, and the second input of elements H of the second and second . the group is the third output of the device, the outputs of the H elements of the third group are connected via diodes to other inputs of the second coding unit. G and and 007 ° 2 FIG. 2 Editor A.Vorovich Order 277/51 Circulation 590 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow,, Raushsk nab., 4/5 Production and printing company, Uzhgorad, Projecto st., 4 J Fi. Compiled by V.Rudakov Tehred, A. Kravchuk Proofreader L. Pilipenko