SU1290311A1 - Device for solving linear integral volterra equations - Google Patents

Abstract

The invention relates to the field of digital computing, to devices for solving integral equations, and can be used as a specialized computing device in measurement and control systems. The aim of the invention is to improve the accuracy by eliminating low-frequency interference. The device contains two coefficient registers, two multipliers, an adder, an output and an input register, an intermediate variable register, and a synchronization unit with corresponding links between them, which allows one to achieve the purpose of the invention. 1 il. o (l

Description

The invention relates to digital computing, to devices for solving integral equations, and can be used as a specialized computing device in measuring and control systems.

The purpose of the invention is to improve accuracy by eliminating low-frequency interference.

The drawing schematically shows the proposed device.

The device consists of the first register I of the coefficient, the second register 2 of the coefficient, the first multiplier 3, the adder 4, the second multiplier 5, the output register 6, the input register 7, the register & intermediate variable and block 9 synchronization, which has outputs 10 and 11.

The device solves Volterra’s linear integral equation of the first

kind of

Jk (t, s) x (s) (t),

(one)

where x (t) is the desired source signal;

y (t) is the recorded signal; k (t, s) is the core of the equation, which is the weight function of the transducer; t - time

For linear stationary transducers, the core is a difference k (t, s) k (t-s) and practically often exponential

k (t) - i exp (- |).

(2)

where t is the time constant of the exponent.

The operation of the device is based on the following mathematical relationships and is described by these relationships. Imagine (O in discrete form, taking into account (2), we obtain the expression

Ji. 1, kh-nh, / -, 4, P exp () x (nh) h

y (nh) ,, k., apply to (3) z-transform:

(four)

f m4g (y (

VZ

where h is the pulse quantization period of the device;

(; p) is a constant.

five . 0

five

0

five

0

five

0

five

After performing equivalent algebraic transformations (4) has the form

. x (z) (y (2) -Vz-V (z)) (5)

Apply to (5) the inverse z-npe- formulation:

x J (Up-UU "..), (6)

where (nh);

y (nh); y, (n-l).

Value 6 describes the algorithm for operating the device.

The device works as follows.

Before using the device

register 1 is entered value -, in

, P

-, P

Register 2 is a value (- f ;, in Register 7 is a value of y (0).

Consider the I th and device operation cycle that starts when a signal arrives. Start at the corresponding input of the synchronization unit 9 In the first clock, the control signal from the output 11 of the synchronization unit 9 is the operation of receiving the code in register 8 and multiplying in the multiplier 5. Before the second clock the operation of the device at the output of register 8 is established by the value of y. .in the output of multiplier 5 - the value of g (y., -} 1y)

In the second cycle, the control signal from the output 10 of block 9 is used to multiply the multiplier Z. and receive the code in the input 7 and OUTPUT 6 registers. At the end of the second cycle of operation, the value of y is set at the outputs of the current 7 and output 6 registers, respectively. , x., and at the output of multiplier 3 - the value ji.y,.

At the end of the 1th cycle, the value at the output of the adder 4 is set to (y.-} SU;;), and the device enters the state of waiting for the next (i + l) -TO start pulse, upon arrival of which the process repeats.

Claims (1)

Invention Formula A device for solving linear Volterra integral equations containing an input register, an intermediate variable register, an output register, two multipliers, an adder and 312 a synchronization unit, the information inputs of the device are connected to the information inputs of the input register, the outputs of which are connected to the inputs of the first summand., the outputs of the intermediate variable register are connected to the inputs of the first multiplier of the first multiplier, whose outputs are connected to the inputs of the second adder which is connected to the inputs of the first multiplier of the second multiplier, the outputs of which are connected to the information inputs of the output register, the outputs of Kotoporo are connected to the outputs of the device Triplets, inputs of the first coefficient of the device are connected to the inputs of the second multiplier of the second multiplier, inputs of the second factor Launch J1 --10 Compiled A, Chekanov Editor M. Dylyn Tehred L. Oleinik Order 7902/46 Circulation 673 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4 The device is connected to the inputs of the second multiplier of the first multiplier, the start input of the device is connected to the start input of the synchronization unit, the first output of which is connected to the synchronization inputs of the input and output registers and the enable input of the first multiplier, the second output of the synchronization unit the variable and the input of the resolution of the second multiplier, which is different from the fact that, in order to improve accuracy by eliminating low-frequency interference, the output The input register s are connected to the information inputs of the intermediate variable register. Corrector S.Cherni