SU1531105A1 - Device for modeling queuing systems - Google Patents

Abstract

The invention relates to specialized means of computing and is intended to simulate non-stationary processes for the functioning of Markov queuing systems. The purpose of the invention is to increase the speed by applying analytical modeling methods using operator Lie series. The device contains a shift register, a memory block, K multiplicators, K addition blocks, a memory register, a clock generator. The device allows to simulate the dynamics of the service process in real time with an accuracy determined by the number of members of the operator row. 1 ill., 1 tab.

Description

The invention relates to specialized means of computing and is intended to simulate non-stationary processes for the functioning of Markov queuing systems.

The purpose of the invention is to increase the speed by applying simulation methods using operator Lie series.

The drawing shows a functional diagram of the device.

A device for simulating queuing systems contains a shift register 1, a memory block 2, K multiplicators 3, K combining blocks 4, a memory register 5, a generator of 6 TaKTOBfcix pulses.

The basis of the operation of the device is the use of operator rows.

Lie for solving system I of Kolmogorov differential equations. The algorithm of the device

ROTK (t) (A, + t (... h-tAy)).

ate

00

Where

,

V Dpn Tji O, K;

A - the operator pfd coefficients;

t is the current time;

k is the number of members of p yes.

Taking into account the initial conditions R. (0) 1, R. (0) 0,, n, the operators D have the form

ate

I o

n, t

0;

, n

V;

Dp.

 Z ... z.,

The coefficient-1 LL is calculated in advance, taking into account the values of the operators

°

 The algorithm allows simulating the dinanic of the service process in real time with an accuracy determined by the number of members of the operator row.

The operation of the device for simulating queuing systems is carried out in the sequence defined by the clock pulses.

Before starting work, the values of

L, L,. . ., A ,, t.

A device for simulating queuing systems operates as follows.

When power is applied, a 6 clock pulse generator is started. The first I aKTOBbril pulse of the clock generator translates the two-stage register 2 into a state in which the logical level l appears at its first output BOM and this signal is applied to control the first clock of the computations. The second clock pulse of the clock pulse generator 6 translates the register 2 into a state in which the logical output is at its first output and the logical output at the second output is l and this signal is applied to control the second computation clock. The operation occurs in a similar manner until the last clock pulse, which is used to control the last clock of the calculations and at the same time to stop the clock generator.

The first clock pulse zeroed all multiply, add, register

A second clock pulse is applied to memory block 2. At the same time, the value of t is fed to all multiplication blocks, to the first multiplication block, L | ,, ... , Aj, - in all blocks of addition.

The third clock pulse is applied

in block 3 multiply and thereby initiates his work. The result tA .. is fed to the add block f.

The fourth clock pulse is applied to block 4 and initiates

his work. The result is AC, t A is fed to the 3j multiplication block, ..., etc.

With the last clock pulse in the adder 4 j, the value P (t) is formed, which enters the register 5, and the clock pulse generator 6 stops.

The operability check of the device was carried out by implementing the algorithm on a computer and comparing with the result of integrating the system using the Runte-Kutta method. In this case, a single-channel system of mass service was simulated with the rates of receipt of the order and service equal to. The number of members of the operator row was nine.

The test results are presented in the table.

The table shows that by choosing the number of members of the operator row, one can achieve the required accuracy of calculations.

At the same time, the result is obtained much faster, since it contains a finite set of simple operations and the speed of calculation depends only on the speed of the device blocks.

Claims (1)

Invention Formula A device for simulating queuing systems comprising a clock pulse generator, a shift register, a memory register and a memory block, the output of the clock pulse generator is connected to the shift register shift input, in order to decrease. speed by applying modeling methods using operator Lie series, it additionally contains K multiplicators and K adders (K is the number of members of the operator series), the first information output of the shift register 515 connected to reset resetting all multipliers, adders n memory register, the second informational output of the shift register is connected to the read input of the memory block, the third to (K + 2) -th information outputs of the shift register are connected to the gates. The multiplication points, respectively, from the first to the K th multiplication block, from the (K + 1-3) th to (2K + 2) th information outputs of the shift register are connected to the resolution enable inputs from the first to the Kth adder, information (2K + 2) -n output of the shift register is connected to the input of the clock generator, the first information output of the memory block five connected to the first information input of all multipliers, the second information input of the first multiplication unit is connected to the second information output of the memory block, the remaining information inputs of which are connected respectively to the first information inputs of the adders, the second the information input of the i-ro adder (i 1, K) is connected to the output of the i-ro multiplication unit, the second information input of the j-ro multiplication unit (j, K) | connected to the output of the (j-l) -ro adder, the output of the K-th adder is connected to the information input of the memory register, whose information output is the output of the device.  i - ,, - 1 F