SU1282144A1 - Device for transmission of information in ring communication channel - Google Patents

Abstract

The invention relates to devices used in data transmission systems, and in particular, to devices providing data transmission over a ring channel of a local computer network. The aim of the invention is to improve the speed. The device comprises a transceiver unit, a mode switching unit, an information transmission unit, a transmitter trigger unit, a synchronization unit. 4 hp f-ly, 6 ill.

Description

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The invention relates to devices used in data transmission systems, and in particular, to devices providing data transmission over a local computing channel. network, as well as preventing channel collisions due to collisions of signals in the channel.

The purpose of the invention is to increase speed.

Figure 1 presents the block diagram of the device; figure 2 - block diagram of transceivers; FIG. 3 is a diagram of a mode switching unit; figure 4 - diagram of the transmitter start; FIG. 3 is a block diagram of information transfer; figure 6 - timing charts of the synchronization unit.

The device contains (Fig. 1) transceiver unit 1, mode switching unit 2, information transfer unit 3, transmitter start unit 4, synchronization unit 5.

The transceiver unit 1 contains (f d.2) receiver 6, switch 7, first element AND 8, transmitter 9, first element OR 10, fourth element AND 11, third element AND t2, second element And 13, trigger 14, second element OR 15, element NOT 16. °

The mode switching unit 2 contains (FIG. 3) the first register 17, the decoder 18, the first trigger 19, the first element & nt: 20 delays, the third element 21, the third trigger 22, the second element -35 delay 23, the element OR- NOT 24, the second register is 25, the first element is And 26, the second element is And 27, the second trigger is 28. 40

The transmitter trigger unit 4 contains (FIG. A) a second register 29, the first element I 30, the element OR -

0-20

25

thirty

first register 54, decoder 55, first trigger 56.

FIG. 1 to 5, the positions 57-77 are denoted. The inputs and outputs of the blocks, in FIG. 6, the numbers in the time diagrams correspond to the numbers of the inputs of the blocks in FIG.

The device works as follows.

The data transmission system is formed by a data chain of devices, each of which performs the following sequence of actions.

1. Listens to the channel in order to detect other people's programs.

2. In the event that a foreign transmission is detected for some time, the device breaks down the communication channel of the ring channel and transmits a special frame D with its own address through its transmitter in order to sound the channel to breaks at other similar devices.

3. P1 listens to the channel and determines -: em, whether frame A came to the receiver of the device with the address of this device. In the event that the frame sent by this station entered

the input of this device, it switches to the mode of conducting a session of information transfer. If the frame of this device has not arrived at the receiver input, the device transitions to the re-sending of special frames, notifying of a conflict in the channel, waiting before trying again to transmit its information and connecting the channel ring.

4. In the first mode (conducting a communication session), each device transmits its own piece of information enclosed in frame B. After the transmission is completed

NOT 31, the third trigger 32, the frame 45 element B, the device performs the overdrive 33, the second trigger 34, the second element 35, the first trigger 36, the first register 37, the decoder 38, the third element 39.

The information transfer unit 3 contains (50) the third register 40, the first element AND 41, the second element OR-NOT 42, the fifth trigger 43, the second delay element 44, the second element AND

giving a special frame End of the transfer and waits for it to come after passing through the ring. After that, the device connects the channel ring of the data transmission system.

5. In the second mode, the device. realizes momentary blocking of the transmitter, followed by send43,. the fourth trigger 46, the third ele-55 channel special frame B Kontment I 47, the second trigger 48, the first element OR NOT 49, the second register 50, the first delay element 51, the third trigger 52, the fourth element I 53,

likt and awaits his arrival. In the event that frame B arrives at the receiver input of the device, the latter performs the connection of the channel ring and

to

f5

five

, -35. 40

-

20

25

thirty

first register 54, decoder 55, first trigger 56.

FIG. 1 to 5, the positions 57-77 are denoted. The inputs and outputs of the blocks, in FIG. 6, the numbers in the time diagrams correspond to the numbers of the inputs of the blocks in FIG.

The device works as follows.

The data transmission system is formed by a data chain of devices, each of which performs the following sequence of actions.

1. Listens to the channel in order to detect other people's programs.

2. In the event that a foreign transmission is detected for some time, the device breaks down the communication channel of the ring channel and transmits a special frame D with its own address through its transmitter in order to sound the channel to breaks at other similar devices.

3. P1 listens to the channel and determines -: em, whether frame A came to the receiver of the device with the address of this device. In the event that the frame sent by this station entered

the input of this device, it switches to the mode of conducting a session of information transfer. If the frame of this device has not arrived at the receiver input, the device transitions to the re-sending of special frames, notifying of a conflict in the channel, waiting before trying again to transmit its information and connecting the channel ring.

4. In the first mode (conducting a communication session), each device transmits its own piece of information enclosed in frame B. After the transmission is completed

45 frames B the device transmits a special frame. The end of the transmission and waits for it to arrive after passing through the ring. After that, the device connects the channel ring of the data transmission system.

5. In the second mode, the device. short-term blocking of the transmitter, after which a special frame B Config

 channel special frame B Conf

likt and awaits his arrival. In the event that frame B arrives at the receiver input of the device, the latter performs the connection of the channel ring and

3 1282144

after a short wait, it enters the state described in claim 1. In the event that frame b disappears in the channel, the device repeats this frame until it receives the 5th frame at its receiver,

In FIG. 1, block 1 of transceivers receives all types of frames A, 5jB, G over the channel 76. At the same time, the JO is listening through the channel through the receiver of the block. In the event that the channel is free. During the listening time, the defined duration is after block 3 sends frame b, the signal from input 64 from block 5 and clock pulses from input 62 from block 5 to block 3 are transmitted from block 3 to input 74 of block 1 and through it to the channel of a special frame G End of transmission. After the frame G is completed, block 3 enters the waiting state of receiving this frame on input 58 from block 1. If frame g is received in block 3, then the input 69 of block 1 by signaling the control signal 5 by 5 gives a signal that restores 67, in block 1 of transceivers, the channel channel is broken and, at input 57, block 1 transmits an enable signal to mode switching block 2. This signal initiates sending by block 2 at input 70 to block 1 and through it to the channel of special frame A, probing the breaks of the channel ring in other places of the transmission system

data. This frame contains ad-25 frame B completed, res this device and on it LIE block 1 did not receive frame

the device can recognize it. Re- (somewhere the breakdown of the frame and frame A's frame from block 2 occurs due to the operation of one of the machines controlled by the signal 61. In this case, connected to the channel), the block in block 2 is transmitted to the input 62 after -30 2, at input 75, initiates the operation of a pulsed sequence, carrying out 4 to 4 transferring the frame A to the state in the state of activation of this nome code (serial code station. This occurs as follows: BUT). After transmitting frame A, the device listens to the channel using block 1 35. Frame A passes through the channel ring and reaches the receiver of block 1, and then, at input 58, is transmitted to block 2. Obviously, this

channel ring update. Thus, the information transfer session ends. Thus, it contains two main phases: the establishment of the connection of stations in the data transmission system (frame transfer B) ;. Disconnecting a channel after a frame B is transmitted by informing other stations connected to the channel that the transmission

at once. The signal delayed for some time is fed to the input 75 of block 4. To the input 62 of block 4, from block 5 there are clocking pulses. With the arrival of the setup signal at the input 66 and in the presence of an enable signal, the occurrence arises if there is no transmission in the channel succession when there is a transmission signal, there are no other gaps related to the operation of other similar devices, if the frame of this device reaches its receiver in block 1 and transmitted via input 58 to block 2, it is recognized by block 2, which by input 63 informs block 3 of the transmission of information about this. Unit 3, under control of a signal at input 63, as well as with clocking pulses at input 62 of unit 3 and issuing a setting signal to input 59, transfers a portion of the information enclosed in a frame to block 1 at input 73 and through it to the channel. Moreover, the length of frame 8 regulates the time of the filing of the installation signal on the input 60 from block 5 to block 2. The time of the signal at the input 59

four

Sw zan-with a temporary wait for the arrival of frame A at the input 76 of the diving device.

After block 3 transmits frame B, control of the signal on input 64 from block 5 and - clock pulses on input 62 from block 5 to block 3 is transmitted from block 3 to input 74 of block 1 and through it to the channel of the special frame G End of transfer. After the frame G is completed, the block 3 enters the waiting state of receiving this frame via input 58 from block 1. If frame g is received in block 3, then a signal that restores frame B is transmitted to input 69 of block 1, block 1 has not received a frame

channel ring update. Thus, the information transfer session ends. Thus, it contains two main phases: the establishment of the connection of stations in the data transmission system (frame transfer B) ;. Disconnecting a channel after a frame B is transmitted by informing other stations connected to the channel that the transmission

(somewhere the circuit breakdown has occurred due to the operation of one of the stations connected to the channel), then block 2 at input 75 initiates the operation of block 4, the device making the transition to the activation state of this station. This happens as follows:

at once. The signal delayed for some time is fed to the input 75 of block 4. To the input 62 of block 4, from block 5 there are clocking pulses. With the arrival of the installation signal at the input 66 and in the presence of an enabling signal by the os code, from block 4 to input 72 of block 1 and further to the channel of the special frame B. This frame contains information for other stations about what happened

conflict and need to delay its transmission for some time. If this frame passes the entire channel ring and returns to the receiver of this device, this means that all

stations connected to the channel are informed of the conflict. Therefore, after a time sufficient to pass the frame around the ring, the reception control circuit of block 4 is automatically started and reception is received at input 58 of frame 5 from block 1 to block 4. If frame B in block 4 is recognized, then at the output of block 4 the signal transmitted to the input 68 in block 1 voi 51282144 6

setting ring. If the frames are from the input 71 side from the block

not recognized, then restoration of the ring5. This is done in view of more frequent

the frame b is not produced and the frame A is applied as a probe

until a frame is a (checking) frame expanding

The element 5 will be accepted. And 8 in the part about removing the signal at the input of the channel ring integrity. Everything

appears at the input 65, which frames A, B, C and D are transmitted to the channel

This device resets the device to receiver 9 at exit 77.

initial position. device.

In Fig. 2, block 1 of P15 transmitter o. In Fig. 3, the mode switching block receives, at input 76, a sequence-transition to operating mode with the arrival of code information of frames A, B, input 57 of the signal block from block 1, and G to receiver input 6. The output of the receive-testimony that channel nick 6 is connected to the input of the switch is disconnected. In this case, the occurrence 7, the input element And 8 and exit. the input 61 of block 2 of the pulse signal, frames A, B, C, and D are transmitted via "ala translates trigger 28 to the position of these three directions. Each frame" thereby allows the transmission to contain a special flag field in the VI element. And 27 clocked pulses of a set of units that affect the ° clock input register 25. Information about the inverted input of the element And 8 and blocks of the frame A frame recorded in the register, its operation. Only in this case, under the action of clocking tea, if the channel is free and on another impulse to shift in the direction of the direct input of the element And 8 the second input of the element And 26 is fed and then the enabling pulse signal from the block output of the block. After ka 5 at input 67, the output of the IW element is transmitted to the last bit of frame A, it takes a single state and, possibly, OR-NOT 24 goes to the state acting on the installation input and automatically enables the new trigger 14 The latter switches, recording frame A to register 25. Simultaneously. In the state O, the signal 1 from the output of the control input element of the switch 7 acts in turn, after OR-NOT 24 sets the trigger to O, which causes the ring channel to be broken .28 and thus blocks the supply of the trigger signal 14 The pulses are inputted to the register input by the element NOT 16 and transmitted. After the recording, a new output is made to the block. The restoration of the frame A and the supply of the new signal 61 of the channel ring is carried out by applying the clock 35 process and is resumed at the input of the installation of trigger 1 on 14 by the arrival of the new signal 57, the process of signal 1 from the element OR of the frame A is repeated. Facti 15, i.e. from two directions - from a block of register 25, elements And 26, 27, ka 4 at the input 68 and from block 3 at the input-OR-NOT. 24, the trigger 28 forms the front 69.. 40 Frame A sensor connected to input I 70 of block 1. Transmitter start up If switch 7 is restored under control of the on state signals, then frames A, B, 57 and 61. C and H propagate past this frame A from the output of an OR-NOT 24 device to the transmitter 9 and through 45 signal 1 enters the input of its element in the channel to other stations of the network.23 the delay and after some inter- transmitter 9 has two main times sets trigger 22 to transmit sequentially tion kodovoyv 1, thereby launching through element information frames A, B, C, D. Firstment AND 21 registers 17 shift by clock- input From the side of switch 7 to the providing input. Register 17 carries out a transit transmission that passes through the input 58 frames, a post-device bridged switch-boxes from block 1, and performs a coroner 7. The second input from the side searches for its own frames A. If OR 10 provides transmission A enters register 17, then oi frames A, B, c, and G are from the side correspondingly recognized by decoder 18, which produce inputs, and input 70 blocking the signal in this case has the highest priority of 1 trigger 19. Trigger 19 in fact is not blocked by block 5, goes state 1 and myruet odds and other inputs 72, 73 and 74 on blocks output control signal 1. If |

the trigger 19 remains in the state O, then with its inverse output it triggers the delay element 20, producing a pulse after a certain time interval. This signal is fed to the input 75 of block 4. The trigger 19 is reset to its initial state using the signal 60. This signal is given after a certain time interval determined by the length of frame B transmitted by block 4 and associated with the duration of the control signal at the input 67. Elements 17-23 form receiver A.

In Fig.4, the transmitter startup unit enters the operating mode upon arrival. This signal causes the transmission of a special frame B by means of a transmitter that combines elements 29–33 blocks. This frame is entered into register 29. To transmit this frame, it is necessary to input clock pulses and a setting signal to 1 trigger to input 62

32 at input 66 from block 5. If signal 75 is present, the frame b will be transmitted to block 1 and through it to the channel. After the transfer of frame B is completed, it is exactly the same as in block 2 switches to state 1 of the element OR NOT 31 and blocks the supply of clock pulses to the input of the register 29, flushing trigger 0 into the O, blocking the second input 39, which prohibits the passage of pulses from input 62. At the same time the signal

1 from the output of the OR-NOT element 31 allows writing a new frame B to the register 29, and after passing through the delay element 33, sets the trigger 34 to 1 and thereby enables the second input of the element. AND 35 to apply clock pulses from the input 62 to the first input element 35. After this, frame B receiver is launched, which includes the elements

33- 38. After some time equal to the time it takes for frame B to travel through the whole ring, frame b enters register 37 and is recognized by the decoder

38, by setting signal 1, trigger 36 to state 1. As a result, a control signal 1 is generated at the output, which restores a channel ring in block 1. After the end of the transmission cycle, the trigger 36 is reset to its original position by a setting signal at input 65. After the transition

0 5

0 5

0

0

flip-flop 36 to state 1, with its inverse output on the third input AND 35, blocks the feed of the clock. The pulses to the input of the register 37. Thus, the block 4, under the control of the block 2 on the input 75 and the block 5 on the inputs 66, 65, expands the functionality of the stations operating in the contention mode in terms of generating warning frames about a conflict until it have arisen ensures reliable connection establishment between partner stations, as in devices using marker cues; transfer of powers, while maintaining a high exchange rate and the absence of centralized control from the host side.

In FIG. 5, the information transmission unit receives, at input 63 from block 2, a signal that frame A has successfully passed through the channel ring and returned to register 17 of block 2-. This signal is maintained until the third output of block 5 fails to send the reset signal of trigger 19 in block 2. Register 40 of block 3 begins to transmit frame B containing the user code, if at the fifth exit of block 5 Signal 1 sets the flip-flop 43 to state 1, by which the flip-flop 43 allows to transmit clocking pulses through input 45 from the input 45 to the register shift shift 40. Frame B is transmitted as a serial code via input 73 of unit 1 and him in the channel. After frame B is transmitted, register 40 is zeroed, the OR-NO 42 element enters state 1, thereby allowing new frame 8 to be written to register 40 and reset to O, trigger 43, blocking the supply of clock pulses to register input 40. Next the frame transmitter waits for a new resolution from the output of block 2 and block 5. At the same time, the signal 1 from the output of the element OR .42 through the delay element 44 sets the trigger 46 to the state 1 and on the third input of the element 47 it allows clock pulses to be input to the register 50, in which frame G is recorded, soda zhaschy information transmission end (session) on the side of the device. Transmission is subject to the condition that

JO

The rigger 48 is set to state G and driven to input 64. It leads to move 74 of block.1. The frame transmitter operates until register 50 is reset. In this case, the element OR-NE 49 switches to state 1, sets the trigger 48 to the state O, thereby blocking the supply of clock pulses through the second input of the element AND 47 and the register 50. At the same time, the signal 1 from the output of the element OR NOT 49 allows new frame G to be recorded in register 50 and after a certain time interval generated by delay element 51 sets trigger 52 to state 1, thereby allowing clocking pulses from input 62 through element 53 to register 54. The latter starts receive information from input 58 of block 1. K Only register 54 enters frame G sent by this device, which means that all stations.

15

. 35

connected to the channel, informed that the session of this device is over, it is recognized by the decoder 55, setting its output signal 1 trigger 56 to state 1. As a result, the output of block 3 generates a signal to restore the channel ring in block 1. After removing the signal At the eighth output of block 5, at input 65 of block 5, a signal 1 resets a flip-flop 56 to its initial position. Thus, block 3 contains two frame transmitters & and G as well as a listening device for receiving frame G. This ensures that the function of transmitting a frame / B with user information and informing other station subscribers and that the station has finished its work and has freed a channel is ensured.

The operation of block 5 is explained in Fig. 6, where the sequence of forming signals at the outputs of block 5 is shown. At the same time, clock pulses are transmitted from the pulse generator at a first output at a frequency that ensures shifts in the registers M to 25 of block 2, 29 and 37

unit 4, 40, 50 and 54 unit 3. According to the 55-h transceiver unit, unit

A transmitter output enable signal is transmitted to the seventh output. Its duration is chosen sufficient to perform a full switching cycle.

five

five

0

Mode in block 2 and performing one of the possible modes: registration of frame B with other stations informing about the desire to occupy the channel; sending frame 6 and the accompanying frame G with information about the end of the session information transfer. Typically, signal 71 is transmitted with some delay relative to signal 67, which is determined by the load on the data transmission system. The duration of the signal 67 is determined by the channel sounding time and the length of the frames of the type L, B, C and D transmitted by the device. After the termination of the signal 67, signals 61 are supplied with a duration sufficient for switching the trigger 28 in block 2. From the moment the signal 61 is given, the time t is kept until the signal 59 is given. The interval is determined by the frame length A and the transit time (return) Frame A to the receiver device. Similarly, the time t is calculated using signal 60, taking into account the time required to transmit and receive frame A, as well as the time to transmit frame B. Signal 64 is related to the start of frame T transmission after a frame is sent, plus some interval the time required to create a pause between. frame B and t, the time of occurrence of signal 66 at the terminal is associated with the interval t and the start of clocking during frame B transmission. Since frame B is transmitted with each failed Channel sounding (not receiving frame A), signal 66 may repeatedly - The time of occurrence of the signal 65 is associated with the termination of the transmitter operation under the control of the signal 71. This is in fact the end of the operation of setup.

va in this communication cycle. The time interval t can be extended depending on the operation time of the transmitter in block 1.

Claims (1)

0 claims 1. A device for transmitting information in a circular communication channel, containing a mode switch, wherein the first information input and the first information output of the transceiver unit are input and output of the device 11 for connection to the ring fy communication channel, allowing the output of the transceiver unit is connected to the enabling input of the mode switching unit, the information output of which 12 AND element, two delay elements, OR-NOT element, while the information input of the first register is the information input of the mode switching unit, the output of the first AND element is the information output of the mode switching unit, the first input of the second AND element is connected to the first input of the third element And, and is the synchronous input of the mode switching unit, the single output of the first flip-flop and the output of the first delay element are the first and second enabling outputs of the switching unit ten connected to the second information input of the transceiver unit, the second information output of which is connected to the information input of the mode switching unit, characterized in that, in order to increase speed, a transmitter trigger unit, an information transmission unit, a synchronization unit, are inserted into it, the information inputs of the mode block -5, respectively, the first input of the transmitter start and the transmission unit of the first element I is authorizing information connected to the second information input of the transceiver block, the third, fourth and fifth information inputs of which are connected to the first and second information the outputs of the information transfer unit and with the information output of the transmitter start-up unit, respectively., the synchronous inputs of the mode switching unit, the transmitter start-up unit and the information transfer unit us with per- vym output synchronization unit, second third and fourth outputs kotoro30 first connected to the first and second synchronized inputs of the mode switching unit and the first synchronized input of the information transmission unit, respectively; the fifth output of the synchronization unit is connected to  the third synchronous input of the j switch unit, whose input is connected to the mode input and the second synchronized input before recording the second register, with the output input of the mode switching unit, the single input of the second trigger, the zero input of the first trigger and the zero input of the third trigger are the first, the second and third setting inputs of the mode switching unit, respectively; in the mode switching unit, the input of the first delay element is connected to the zero output of the first trigger, the single input of which is connected to the output ifrator, the input of which is connected to the information output of the first register, the synchronous input of which is connected to the output of the third element And, the second input of which is connected to the output of the third trigger, the single input of which is connected to the output of the second element 40 the house of the IL-NOT element and with zero input of the second trigger, the output of which is connected to the second input of the second element AND, the output of which is connected to the synchronous input of the second register, the first and second information outputs of which are connected to the second input of the first element AND and to the input of element 45 OR- NOT accordingly. information transfer unit, the sixth output of the synchronization unit is connected to. the third synchronization input of the information transfer unit and the first synchronization input of the transmitter trigger unit, the seventh, eighth and ninth outputs of the synchronization unit are connected to the second synchronization input of the transmitter launch unit, with the first and second permitting inputs of the transceiver unit, respectively; 1, about tl and - information and the block of start is transmitted by the fact that the block is started. The transducer is connected to the first and second inputs of the transmitter and contains two registers, the dam of the request for the transceiver unit 50, the decoder, the delay element, the element, respectively, the first and the second OR-NOT, three triggers, the three AND elements, the decisive outputs of the switching unit, and the information input The first mode is connected to the enabling inputs, which are the information inputs of the information transmission unit and the transmitter trigger unit block, and the transmitter trigger output, respectively. the first element of AND is information2. A device according to claim 1, characterized in that the mode switching unit contains two registers, a decoder, three flip-flops, three the transmitter output, the first input of the second element I is connected to, the first input of the third element AND is the synchronous input 82144-12 AND element, two delay elements, OR-NOT element, while the information input of the first register is the information input of the mode switching unit, the output of the first AND element is the information output of the mode switching unit, the first input of the second AND element is connected to the first input of the third element And, and is the synchronous input of the mode switching unit, the single output of the first flip-flop and the output of the first delay element are the first and second enabling outputs of the switching unit ten  -5 modes, respectively, the first input of the first element I is the resolution, the input of which is connected to the input of the second register, the output of the mode switching unit, the single input of the second trigger, the zero input of the first trigger and the zero input of the third trigger are first, the second and third installation inputs of the mode switching unit, respectively; in the mode switching unit, the input of the first delay element is connected to the zero output of the first trigger, the single input of which is connected to the output ifratora whose input is connected to the data output of the first register, whose clock terminal is connected to the output of the third AND gate, a second input coupled to an output of the third flip-flop, a single input coupled to the output of the second member the home of the IZH-NOT element and with zero input of the second trigger, the output of which is connected to the second input of the second element AND, the output of which is connected to the synchronous input of the second register, the first and second information outputs of which are connected to the second input of the first element AND and to the input of the element OR NOT respectively. 3. The device according to claim 1, about tl and - the fact that the unit is running. transmitter contains two registers, decoder, delay element, element OR NOT, three flip-flops, three AND elements, the information input of the first register is the information input of the transmitter trigger, the output of the first AND element is the information output of the transmitter trigger, the first input the second element And is connected to, the first input of the third element And and is the synchronous input 13 # the transmitter trigger unit, the first input of the first element I is the enable input of the transmitter trigger unit, the zero input of the first trigger is connected to the zero input of the second trigger and is the first installation input of the transmission trigger unit, the third input of the third trigger transmitter triggering, the unit output of the first trigger is the enabling output of the transmitter triggering unit, while in the transmitter triggering unit the output of the third trigger is connected to the second input third And element, the output of which is connected to the synchronous input of the second register 5, the first and second information outputs of which are connected to the second input of the first element And and to the input of element a OR-NOT, respectively, whose output is connected to the input of the second register, with zero input of the third trigger and with the input of the delay element, the output of which is connected to the single input of the second trigger, the output of which is connected to the second input of the second element And whose output is connected to the synchronous input of the first register, the information output of which connected to the input of the decoder, the output of which is connected to a single input of the first flip-flop, the zero output of which is connected to the third input of the second element I. .12 4. The device according to claim 1, about tl and -. Partly because the information transfer unit contains three registers, a decoder, five flip-flops, two elements OR NOT, four AND elements, two delay elements, the information input of the first register being the information input of the information transmission unit. the output of the second register and the output of the first element And are the first and second information outputs of the information transmission unit, respectively, the first input of the second element And is connected to the first inputs of the third and fourth elements And, and is synchronous the house of the information transfer unit, the first input of the first element I is the enable input of the information transfer unit, the output of the first trigger is the output of the request for the information transfer unit, the single input of the second trigger is connected to 10  5 20 23 2144 14 the left inputs of the third and fourth triggers are the first installation input of the information transmission unit, the single input of the fifth trigger and the zero input of the first trigger are the second and third installation inputs of the information transmission section, respectively, while in the information transmission section the single input of the first trigger is connected the output of the decoder, the input of which is connected to the information output of the first register, the synchronous input of which is connected to the output of the fourth element And, the second input of which is connected to the output the third trigger, a single input KOJO-ry is connected to the output of the first delay element, whose input is connected to the zero input of the second trigger, to the recording input of the second register and to the output of the first element OR NOT, the input to which is connected to the second information output. second register, sync input which is connected to the output of the third element And, the second input of which is connected to the output of the second trigger, and the third input to the output of the fourth trigger, the single input of which is connected to the output of the second delay element, which connected to the input of the third register, with the output of the second element OR NOT, with the zero input of the fifth trigger, the output of which is connected to the second input of the second element AND whose output is connected to the synchronous input of the third register, the first and second information outputs of which are connected to the second input first element And with the input of the second element OR NOT, respectively. 5. A device according to claim 1, characterized in that the transceiver unit comprises a receiver, a transmitter, a switch, a trigger, four AND elements, two WL elements, an NOT element, and the information input of the receiver and the information output of the transmitter are the first information input and the output of the transceiver unit, the information output of the receiver is connected to the information input of the switch, with the first input of the first element I and is the second information output of the transceiver unit, the first input of the first e The OR element is the second information input of the transceiver unit, the first inputs 35 40 45 50 55 15 The second, third and fourth And elements are the third, fourth and fifth information inputs of the transceiver unit, respectively, the second inputs of the second, third 5 and fourth elements, And form the first enable input of the transceiver unit, the second input of the first, the input of the transceiver unit, the first and second inputs of the second element OR are the first and second inputs of the transceiver unit request, respectively, the output of the element of the non-transceivers, while in The transceivers of the second, third, and fourth elements are connected to the second, third, and fourth inputs of the first element OR, respectively, the output of which is connected to the first information input of the transmitter, the second information input of which is connected to the information output of the switch, the control input which is connected to the input element NOT and to the trigger output, the unit and zero inputs of which are connected :: the outputs of the second element OR and It is the resolving output of the block of the first element AND, respectively. - I 76 67 74 7J bd 68 70 11 72 75 458. 62 66 65 J 5 Ю 214416 In the transceiver unit, the outputs of the second, third, and fourth elements of AND are connected to the second, third, and fourth inputs of the first OR element, the output of which is connected to the first information input of the transmitter, the second information input of which is connected to the information output of the switch; the input of which is connected to the input of the element NOT and to the output of the trigger, the unit and zero inputs of which are connected :: by the outputs of the second element OR and 58 57 59 60 61 62 58 6J 59 82 6 65 J / h 7 g one figure 1 "WIG." Puf .. TO four 45 4J t 9 n 52 (.five four/ 73 five 74 n 69 o four about 47 45 56 155 5f 46 55 o 54 52