SU1274155A1 - Optronic module - Google Patents

Abstract

The invention relates to a pulse technique. It can be used in various automation devices, including digital computers. The purpose of the invention is to increase the reliability and speed of the optoelectronic modulus, achieved by reducing the information shift time from 2 clock periods to one and by reducing the time to lock-in the regenerative optocouplers of the cells. Expansion of functionality is achieved by allowing the measurement of time intervals. The device contains triggers 3 and 2I, elements And 28, 29, 30 and 31, transistors 47, dividing diode groups 55, 56, and 57, additional 1: element 61, light sources 48 associated with photoreceivers 52. In the drawing, digital positions They show o (O inputs and outputs of all used plots, power bus, even and odd and fly, inputs of forward and reverse counting, inputs of control signals. I Il. Si

Description

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The invention relates to a pulse technique and can be used in various devices of discrete automation.

The aim of the invention is to increase the speed by reducing the information shift time from 2 clock periods to one by reducing the lock-up time of the regenerative cell optocouplers, as well as expanding the functionality of measuring time intervals.

Fig. 1 is a schematic diagram of the device; figure 2 - timing charts of the device.

The device contains bit cells i, cell 2 of the original composer, counting trigger 3, node 4 per counting counting direction with the first fourth outputs 5-8, first bus 9 odd pulses, first bus 10 even and pulses, second bus 11 odd pulses, second nguin 2 even pulses, third bus 13 odd pulses, third bus 14. even pulses, first and second 16 inputs of counting unit 4, direct with inverse outputs 17 and 18, counting input 19 C and 20 counting trigger 3, R6 - trigger 21 with direct 22 and inverse 23 outputs, R input 24 and S-input 25, INPUT 26 direct device counting, device 27 counting input 27, first - fourth elements AND 28 - 31, with first inputs 32 - 35 second inputs 36-39 and output 1 1 40 - 43, respectively bit Cells 1 and 2 of the initial state have the first - third inputs 44 - 46 of the control and contain a transistor 47, a source of light 48 with the first and third optical outputs 49 - 51, the first and the third photodetectors 52 54, the first - the third separation diodes 55 - 57, the resistor 58 , common tire 59, power bus 60, additional element 61 of the first 62 and second 63 inputs and output 64, In addition, the device contains a recording input 65, a clock input 66, a reset initial input 67, and the initial state cell 2 contains an additional resistor 68 and an additional LED 69.

An optoelectronic module containing bit cells 1.1-1.9 and 1 day 552

the initial state 2, the counting trigger 3 and the counting direction switching node 4, the first input 15 of which is connected to the forward output 17 of the counting trigger 3, the second input 16k to the inverse output 18 of the counting trigger 3, the first output 5 of the counting switching side 4 is connected to the first bus 9 odd pulses, the second - the fourth outputs 6 - 8 to the first bus 6 even pulses, the second bus 7 odd pulses and the second bus 8 even pulses, respectively, the first bus 5 odd pulses are connected to the first control inputs 44 of odd bits s cells 1.1, 1.3 ... 1.9, the first bus 10 even pulses - to the first input

44 control of even bit cells 1.2, 1. 4.. . 1 .8 and cells 2 of the initial state, the second bus 1I of odd pulses is connected to the second inputs

45controlling odd bit cells 1.1, 1.3 ... 1.9, second bus 12 even pulses - to the second inputs

45 control of even bit cells 1.2, 1.4 ... 1.8 and cells 2 of the initial state, which contain in their

The composition of the regenerative optocoupler, in which the first output of the source 48 of the light is connected to the power supply bus 60, the second output to the collector of the transistor 47, the emitter of which is connected to the common bus 59, the base to the first drives

the first - the third photodetectors 52 - 54 and through resisgor 58 to the common bus 59, the first optical output 49 of the light source 48 is connected with the first photoreceiver 52 of its cell, the second optical output 50 - with the second photodetector 53 of the next bit cell, the third output 51 - with the third photodetector 54 of the previous bit cell, a third bus of 13 odd pulses, a third bus of 14 even ig-pulses are entered, the first cell of the initial state is inserted into the first and third separating diodes in the cell of a single discharge cell 1.1, 1.2 ... 1.9 55-57, in cell 2 of the original state In addition, the additional resistor 68 and the additional LED 69, the counting direction switching unit 4 contains an RS flip-flop 21 and four AND 28-31 elements, a direct output 22 of the RS flip-flop 21 is connected to the first inputs 32 and 33 of the first and second elements Both 28 and 29, in31 versa output 23, to the first and second inputs 34 and 35 of the third and fourth elements And 30 and 31, the first input 15 of the counting direction switching node 4 is connected to the second inputs 36 and 38 of the first and third elements And 28 and 30, the second input 16 - to the second inputs 37 and 39 of the second and fourth elements And 29 and 31, in The outputs 40 - 43 of the first - fourth elements And 28 - 31 are connected respectively to the first - Fourth outputs 5-8 of the counting node 4, the third bus 13 odd pulses are connected to the forward output 17 of the counting trigger 3 and to the third input 46 of the control odd of bit cells 1.1, 1.3, 1.5 ... 1.9, the third bus of 14 even pulses is connected to the inverse of the 18 of the countable trigger 3, to the third input 46 of the control of the even bit cells of 1.2, 1.4 ... 1.8 and cells 2 of the initial state, in which an additional LED 69 is optically coupled to a second ph by the receiver 53, the anode of the additional LED 69 through the additional resistor 68 is connected to the power bus 60, the cathode to the R input 20 of the counting trigger 3 and to the device input 67 the initial state of the device, S input 25 RS flip-flop 21 is connected to the input 26 direct counting, R inlet 24 - to the input 27 of the counting device, in all cells 1.1, 1.2 ... 1.8, 1.9 and 2 between the first third control inputs 44 - 46 and the second terminals of the second, third and first photodetectors 53, 54 and 52 respectively included the first - the third separation diodes 55 - 57, in the role of the first photodetector 52, a photodiode is used, the counting input 19 of the counting trigger 3 is connected to the output 64 of an additional element And 61, the first input 62 of which is connected to the input 65 of the recording, the second input 63 to the clock input 66 of the device, the third optical output 51 of the light source 48 2 of the initial state is the loan output, the second optical output 50 of the light source 48 of the last bit cell 1.9 is the transfer output. Optoelectronic module operates as follows. In order for the module to be ready to record information on the power bus 60, it supplies55 to set the supply voltage. low potentials are fed to the input 67 of the initial state and to the input 26, while the trigger 21 is set to one state and the trigger 3 is set to zero. As a result, the first input 33 of the And 29 element enters 1 from the direct output 22 of the flip-flop 21, and the second input 37 receives the I from the inverse output 18 of the flip-flop 3, therefore, the output of the And 29 element has a high potential and at the outputs of the And 28 elements , 30, 31 - low potentials. At the same time, the excitation of the cell 2 module occurs. At the cathode of the LED 69 - O, the power supply bus 60 - resistor 68 - LED 69 current is flowing through the circuit, which excites LED 69, the latter in turn optically acts on the photodetector 53 cells 2. Under the action of this connection and the high potential from the bus 6 the resistance of the photodetector 53 decreases sharply and as a result, the transistor 47 opens. Through the collector-emitter circuit of transistor 47 - light source 48 flows current, light source 48 emits light, and output 49 through photodetector 52 provides positive feedback, cell 2 stores information. From the output 50 of the source 48 of the light of cell 2, the light signal acts on the photodetector 53 of the next bit cell 1.1, preparing it for operation. When performing the Addition operation, in order to record the operands, it is necessary to input a low potential to the input 25 of the trigger 21, which sets it to one state. As a result, tires 9 and 10 are connected, and bus 11 and 12 are disconnected. The first input 62 of the element And 61 from the input 65 of the record receives the recording signals, and the second input 63 - the clock pulses from the input 66. The trigger 3 starts to work in the counting mode. With the arrival of a signal from input 65 and the presence of a clock signal from input 66, trigger 3 will go into one state, i.e. at the direct output, and at the inverse — O. As a result, at. the output of 41 elements And 29 - low potential, since the second input 37 comes in from the output 18 of the output of the flip-flop 3, and the output 40 of the element And 28 - high

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potential, since the first input 32 enters I from the direct output of flip-flop 21, and to the second input 36 from the direct output 17 of flip-flop 3.

Under the action of the optical signal from the output 50 of the source 48 of the light source chaga 2 and the high potential coming from the bus 9, the resistance of the photodetector 53 sharply decreases. As a result, the transistor 47 of the discharge cell 1.1 opens, a current flows through the collector-emitter circuit, the light source 48 emits light and through the output 49 acts on the photodetector 52, providing positive feedback. The cell remembers the recording signal.

Locking the cell gap 2 is due to the presence of a resistor 58 and zero potential from the busbars 10 and 14, which leads to the locking of the transistor 47, and the supply of zero potential from the bus 13 through the diode 57 and the photodetector 52 (photodiode) noticeably shortens the locking time transistor 47.

With the arrival of the next write pulse, trigger 3 will go to the zero state, i.e. at the direct output, and at the inverse output 18 - 1. As a result, the potential for bus 9 is low, and the potential for bus 10 is high.

Under the action of optical communication with the terminal 50 cells 1. 1 to a photodetector 53 cells 1.2 and a high potential from E1INA 10, the resistance of the photodetector 58 cells 1.2 sharply decreases,. the transistor 47 is opened, the regenerative optocoupler of the 1.2 cell is energized, and the regenerative optocoupler of the 1.I cell is closed, similar to the one described above.

Similarly, the following module slots are triggered. The number of triggered cells of module 10 is determined by the duration of the recording signal from input 65.

When recording the second operand, several subsequent cells will work.

When the modulus's discharge grid overflows, the transfer unit appears at the output 50 of the last cell 1.9 module

When performing the Subtraction operation, the first operand is written as in the addition, and to write the second operand to the input 27 of the flip-flop 21 sub 556

There is a zero potential, which sets the trigger 21 to the zero state, therefore, buses 9 and 10 are disabled, i.e. have low potentials, and tires II and 12 are connected, i.e. have high potentials alternately, depending on the length of the write signal of the bus 65. As a result, countdown links are implemented, i.e. when the second operand is subtracted from the recorded first operand, the cell states are reversed, going from one to zero.

In accordance with the timing diagrams in FIG. 2, when information is shifted by one bit, time is needed

T t.t,

where t is the cell excitation time; TD is the time of locking the cell.

When t ,, T 27.

Since, in the prototype, the transition time of the signal to the neighboring cell is 4t, there is a performance gain of two times. In addition, other cell switching in this device has the following, i1o feature: the subsequent cell is excited and the previous cell is locked almost simultaneously (the excitation from the LED 13 to the photocell 53 of the subsequent cell occurs somewhat earlier than the previous cell is blocked by the diode 57 - photodetector 52 .

The test showed a 10% reduction in time to lock the transistor.

If an electrical signal is applied to the input 65, the duration of which is proportional to a certain time interval, the device makes it possible to measure it.

Claims (1)

Invention Formula An optoelectronic module containing bit cells and a source state cell, a counting trigger and a billing direction switching node, the first input of which is connected to the forward output of a counting trigger, the second input is to an inverse output of a counting trigger, the first output of a counting switching center of the counting terminal is connected to the first the bus of odd pulses, the second, third and fourth outputs to the first bus of even pulses, the second bus of odd pulses and to the second bus of even pulses, respectively, the first bus of odd pulses is connected to the first control inputs of odd bit cells, the first even-pulse busses to the first control inputs of even-bit cells and the initial state cell, the second bus of odd pulses connected to the second control inputs of the odd-bit cells, the second bus of even pulses to the second control inputs of even bit cells and cells of the initial state, all cells contain in their composition a regenerative optocoupler in which the first output of the source is connected to the power supply bus, the second output is connected to the collector of the transistor, em the tter of which is connected to the common bus, the base to the first terminals of the first, second and third photodetectors and through a resistor to the common bus, the first optical output of the light source is connected to the first photodetector of its bit cell, the second optical output to the second photodetector of the next bit cells, the third output - with the third photo receiver of the previous bit cell, characterized in that, in order to increase speed and enhance functionality, a third bus of odd pulses, a third The bus of even pulses, the additional element And, in each bit cell and in the cell of the initial state are entered the first, second and third separating diodes, in the cell of the initial state are introduced, in addition, an additional resistor and an additional LED, the counting unit of the counting direction contains RS trigger and four elements And, direct output RS-trigger 12 58 is connected to the first inputs of the first and second elements And, inverse to the first and second inputs of the third and fourth elements And, the first input of the direction switching node accounts connected to the second inputs of the first and third element And, the second input to the inputs of the second and fourth elements And the outputs of the first, second, third and fourth elements And connected respectively to the first, second, third and fourth outputs of the switching node of the counting direction, the third bus odd pulses are supplied to the forward output of the counting trigger and to the third control input of the odd bit cells, a third bus of even pulses is connected to the inverted output of the counting trigger, to the third control input of even p base cells and cells of the initial state, in which the additional LED is optically connected to the second photodetector, the anode of the additional LED through the additional resistor is connected to the power bus, the cathode to the R input of the counting trigger and the installation input to the initial state of the device, S - the RS-flip-flop input is connected to the direct count input, the R input - to the counting input of the device, in all cells between the first, second and third control inputs and the second pins of the second and third, and the first photodetectors are turned on venno first, second and third dividing diodes, as the first photodetector is used the photodiode trigger count input connected to the counting output of the additional AND gate having a first input connected to a write input, a second input - to the clock input of the device. TseykaG. fi Z