SU1267406A1 - Device for adding numbers - Google Patents

Abstract

The invention relates to the field of computer technology and is intended to add multi-bit binary numbers represented in a reverse code. The purpose of the invention is to increase speed. The device contains k-bit summation blocks made, for example, on the basis of blocks of permanent memory and connected in series. Corresponding operands and input carry are delivered to the inputs of these blocks. Signs of input operands are supplied to two additional inputs of each memory block, and at the additional output of the higher block, a sum sign is formed. 1 silt, 2 tab.

Description

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The invention relates to computer technology and can be used in the construction of specialized computing devices, for example, for medical electronic diagnostic systems. The purpose of the invention is to increase the speed of interaction. The drawing shows the block diagram of the device for adding chitJ7 The device for adding numbers contains tabular summing blocks that can be performed, for example, by programming the fixed memory blocks, input 2 of the first operand, input 3 of the second operand, inputs 4 and 5 characters of operands , output 6 amounts and output 7 characters cyMistbi. Each block 1 except 2 to the inputs (operands) and to the outputs of the sum also contains (2k +1) -th input 8 (transfer), (k + 1) -th output 9 of the sum (transfer) J (k. +2) - the first and (K +3) th inputs 10 and 11, which are connected to the inputs 4 and 5 of the device, and the senior (nth) block 1 also contains (K +2) -and output 12 sum (sign). This device is implemented (it adds the addition of numbers with characters represented in the reverse binary code. In this case, the corresponding inputs of blocks 1 are considered as bits of the address of blocks of the Constant memory. When implementing three-digit blocks 1 in accordance with Table 1 (programming of the fixed 5 memory (programming of a constant memory block to implement the remaining tabular summing blocks) 5 the first bit of the address is 1, exit 8, bits from the second to the fourth are inputs of the first operand, bits from the fifth to the seventh inputs of the second operand, and bits of the eighth and ninth inputs of the characters of the first and second operands. The high bit of the output of block 1 is output 9. In the nth block 1, the fourth bit of output is Output 12. The operation of the device is based on reading from the block of permanent memory, implementing block 1, the code of the transfer sum at the address generated by the bits of the operands, their signs and the input transfer. In this case, for all possible codes of the carry operands in the block, a corresponding result value is provided, constructed in accordance with the rules for adding numbers in the reverse code. The resulting cyclic transfer comes from the output 9 of the senior unit 1 to the input 8 of the younger unit 1. Table 1

00010102

01.020203

02030304

03040405

04050506

05060607

06070708

070808.09

07080607

08090708

0505 06Об070708

0606 0707080809

0707 08080909ОА

0808 0909ОАОАОБ

0909 AAOBOVOS

JSCA OVOSVOSODOD OVOV OSOSODODOE OSOS ODODOEOOOF

0402 0301020001

0503 0402030102

Continuation of table 1

Claims (1)

Table The invention The device for adding numbers containing tabular summing blocks, with inputs from first to k and where n is the width of the tabular summing block, each i -th tabular summing block, where t 1,.,., N,. respectively, with bits from ((1-1) k + 1) -ro to i Y- and the input of the first operand of the device, and inputs from (q. +1) to 2 s - and each I-th tabular summing the unit is connected respectively with bits from ((i -1) to +1) -th to L to-and input of the second operand of the device, outputs of the sum from the first to the k-th of each L-th table sou miruyusche} th block are connected correspondingly with Continued table. 2 bits from ((i-1) to +1) of 1k -y output of device sum, (to +1) -th output of the sum of each i-th tabular summing block is connected to (2 to +1 +1) th input (L +1) th tabular summing block, characterized in that, in order to increase speed (2 kh-2) -th and (+3) th th inputs of each tabular summing block are connected respectively to the character inputs of the first and the second operand of the device, (to the sum of the sum of the nth tabular summing block is connected to the (2K +1) th input of the first tabular summing block, (to +2) - and the sum output of the And th tabular summing the unit is connected to the output of the sign of the sum of the device. / W) AA ((t / J- / ff) t (4f ff - / j / ff /} k) II I ii II .jt ™. ™.-.... “ I i U ™ - „...„. I -TT -U