SU1626385A1 - Device for binary-residue conversion - Google Patents

Abstract

The invention relates to computing and is intended to convert a number from a binary code to a code of a system of residual classes. The device contains adders 2 modular unitary code and a decoder 3 with connections. Moreover, the adders 2 of the unitary modular code perform switching by means of multiplication by two values of the first one and adding the value of the second term modulo ;. 2 yl

Description

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The invention relates to computing and is intended to convert binary codes into code of the number system of residual classes (CCOS) in high-performance computers running on CCOS.

The aim of the invention is to simplify the device.

FIG. 1 shows a diagram of a device for converting a binary code into a CCOS code; in fig. 2 - adder unitary codes modulo (dl).

The device (Fig. 1) contains a register 1, (pM-1) adders 2 unitary codes modulo a decoder 3, an output 4 devices, and the outputs M of the higher bits of register 1 are connected respectively by the inputs of the bits of the input of the decoder 3, the outputs of which connected to the inputs of the bits of the first addend (pM-1) of the adder 2 unitary codes modulo. The input of the first addendum of the K-th adder 2 unitary codes modulo is connected to the output (CI) of the th adder 2 unitary codes modulo, the output of the first adder 2 unitary codes modulo is output 4 of the device, the output of the K-th bit of the register 1 is connected to the input of the second addendum of the K-th sum of 2 unitary codes modulo the input of the device to the input of the register 1

The adder 2 unitary codes modulo (figure 2) contains the first to the sixth elements And 5-10. the input of the first discharge of the input of the first term of the adder 2 unitary codes modulo connected to the first inputs of elements 5 and 6, the input of the second discharge of the input of the first term of the adder 2 unitary codes modulo the first inputs of elements 7 and 8, the input of the third discharge Yes, the inputs of the first adder of the adder 2 unitary codes modulo the first inputs of the elements 9 and 10. The input of the first discharge of the input of the second term adder 2 unitary codes modulo the second inputs of the elements 5,7 v, 9, input, the second bit yes the second entrance adder unit 2 unitary codes modulo the second inputs of the elements 6 and 8 and 10, the outputs of the elements 5 and 8 are combined and are the output of the first discharge of the adder 2 unitary codes by modup, the outputs of the elements 6 and 9 are combined and are the output of the second bit of the output of the adder 2 unitary codes modulo, the outputs of the elements 7 and 10 are combined and are the output of the third bit of the output of the adder 2 unitary codes modulo It should be noted that the combination of the outputs of the elements And the adder 2 performs the function of logical Or

the numbering of the bits is given in order of increasing their values.

The device works as follows.

Register 1 enters in parallel

Code binary number X:

 + An-1 + ... A02 °. (1)

The value of the module by which the conversion will be performed, let it be R.

0 To describe it in binary code, M bits will be required, i.e.

P 2m - y (2)

M log2 (P + y), (3)

where y is the value indicating how long the modulus P is less than 2 m.

Thus, the length of the input word of the decoder 3 can be found from (3). In the decoder 3, a binary code is converted with a length of M bits to

0 unitary code Next, the converted number is fed to adders 2, where by switching the bits the number is shifted left by one bit and the unit is added if, in the register bit 1, 5 connected to the second input of the corresponding adder 2, the result of the conversion is removed from the output 4 devices.

The binary code size does not matter, since the build-up of the bit size is carried out by simply adding adders 2 to the device, which improves the homogeneity of the device and can be used to make it integral.

Claims (1)

5 Formula of Invention A device for converting a binary code into a number system of residual classes containing (pM) adders of unitary codes modulo (n0 number of bits, M is the number of bits necessary to represent a module), and the output of the first adder is unitary codes modulo is the output of the device, the input of the first addend of the K-th 5 (... 1od2p -1) adder unitary codes modulo connected to the output of the (K + 1) -th adder unitary codes modulo, is that. in order to simplify the device, it contains a de0 encoder, and the inputs M of the higher bits of the input of the device are connected respectively to the inputs of the bits of the input of the decoder, the outputs of which are connected respectively to the inputs of the bits of the input 5 of the first addend (pM-1) of the adder of unitary codes modulo, the input of the first addend a go (a 1d2p ... pM), adder of the unitary codes modulo, dinene with output (a 1) - th adder unitary codes modulo input 516263856 the second term V-th (... p-M-1) is summed by the para-phase input B-ro of the unitary code input modulo the device.